參數(shù)資料
型號： μPDPD30101
廠商： NEC Corp.
英文描述： 64-Bit Micro[rocessor(64位微處理器)
中文描述： 64位微[rocessor（64位微處理器）
文件頁數(shù)： 26/97頁
文件大?。?/td> 409K
代理商： ΜPDPD30101
μ
PD30101
25
Figure 3-9. Kernel Mode Address Space
64 bits
0.5G bytes
w/TLB mapping
0.5G bytes
w/TLB mapping
0.5G bytes
w/o TLB mapping
Uncacheable
0.5G bytes
w/o TLB mapping
Cacheable
Note 2
Address error
w/TLB mapping
Address error
1T bytes
w/TLB mapping
Address error
1T bytes
w/TLB mapping
ckseg3
cksseg
ckseg1
ckseg0
xkseg
xkuseg
xksseg
32 bits
Note 1
0.5G bytes
w/TLB mapping
0.5G bytes
w/o TLB mapping
Cacheable
Note 2
2G bytes
w/TLB mapping
kseg3
ksseg
kuseg
0.5G bytes
w/TLB mapping
kseg1
kseg0
0.5G bytes
w/o TLB mapping
Uncacheable
No TLB mapping
(For details, refer
to
Figure 3-10.
)
xkphys
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0 x
F
F
F
F
F
F
F
F
0 x
0
F
F
F
0
F
0
F
0
F
0
F
0
F
0
F
F
D
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0 x
0 x
0
F
F
F
0
F
0
F
0
F
0
F
0
F
0
F
C
B
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0 x
0 x
F
D
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0 x
0 x
0
F
F
F
0
F
0
F
0
F
0
F
0
F
0
F
A
9
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0 x
0 x
0
F
F
F
0
F
0
F
0
F
0
F
0
F
0
F
8
7
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0 x
0 x
C
B
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0 x
0 x
0
F
C
C
0
F
0
F
0
F
0
F
0
F
0
F
8
7
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0 x
0 x
0
F
C
B
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0 x
0 x
A
9
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0 x
0 x
0
F
8
7
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0 x
0 x
0
F
4
4
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
1
0
0
0
0
0
0
0
0
0
0 x
0 x
8
7
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0 x
0 x
0
F
4
3
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0 x
0 x
0
F
0
0
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
0
F
1
0
0
0
0
0
0
0
0
0
0 x
0 x
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 x
0
0
0
0
0
0
0
0
0 x
Notes 1.
In the 32-bit mode, the value of bit 31 is sign-extended to bits 32 through 63. For details, refer to
V
R
4101 User’s Manual
.
2.
Whether this area is used as a cache area is specified by the K0 field of the config register.
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