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| 型號(hào)： | μPD9210FGC-7EA |
| 廠商： | NEC Corp. |
| 英文描述： | USB Host Controller(USB主控制器) |
| 中文描述： | USB主機(jī)控制器（的USB主控制器） |
| 文件頁(yè)數(shù)： | 49/95頁(yè) |
| 文件大?。?/td> | 423K |
| 代理商： | ΜPD9210FGC-7EA |
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CHAPTER 3 DESCRIPTION OF USB HOST CONTROLLER FUNCTIONS
49
Figure 3-21. Distinctions between Legacy and USB
IR
Note
= 1:SMI
←
1
IR
Note
= 0:INTA
←
1
I/O Access to HC
Disable
IR
Note
= 1:SM
←
1
IR
Note
= 0:INTA
←
1
Emulation for
USB Keyboard/mouse
Emulation for
Legacy Keyboard/mouse
Emulation Done
Data to Keyboard
Controller
Read HceInput
EmulationEnable
←
0
Read HceInput
Make USB TD
InputFull
←
0
CmdData = 0:
I/O Write HceInput Data
to 60h
CmdData = 1:
S
oftware (HDC, BIOS,
Driver)
proceed
Note
IR = InterruptRouting
GateA20 sequences occur frequently in DOS applications, where they mainly set A20 as valid or invalid. To
reduce the number of SMIs that occur due to GateA20, the HC generates an SMI (System Management Interrupt)
only when the GateA20 status is to be changed by a GateA20 sequence.
Table 3-5 lists operation conditions and HC operations.
Table 3-5. GateA20 Sequences
Condition
HC
GateA20
Sequence
Value Written to I/O (64h)
Value Written to I/O (64h) (bit 1)
GateA20
Sequence
InputFull
1
0
D1h
0
→
1
0
2
0
FFh
0
1
3
0
Except D1h/FFh
0
1
4
1
D1h
1
0
5
1
FFh
1
→
0
0
6
1
Except D1h/FFh
1
→
0
1
7
1
Value does not match A20State
1
1
8
1
Value matches A20State
1
0
The system software first sets the A20State for HceControl. Next, it sets the GateA20 sequence as valid by
writing D1h to I/O (64h), which sets GateA20Sequence for HceControl. When GateA20Sequence has been set, any
data whose bit 1 value is not A20State is written to I/O port 60h and InputFull is set. At that point, HC confirms that
“1” has been set to MemoryAccess, InputFull, and EmulationEnable, after which an interrupt occurs. When the
system software detects this interrupt, processing of GateA20 begins.
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