
- i -
CONTENTS
CHAPTER 1 INTRODUCTION ...........................................................................................................
1.1
General...................................................................................................................................
1.2
Architecture Features...........................................................................................................
1.3
Product Development...........................................................................................................
1.4
CPU Configuration................................................................................................................
1
1
2
3
4
CHAPTER 2 REGISTER SET ...........................................................................................................
2.1
Program Registers................................................................................................................
2.1.1
Program register set....................................................................................................................
2.2
System Registers..................................................................................................................
2.2.1
Interrupt status saving registers ..................................................................................................
2.2.2
NMI status saving registers .........................................................................................................
2.2.3
Exception cause register .............................................................................................................
2.2.4
Program status word ...................................................................................................................
2.2.5
System register number ..............................................................................................................
5
5
5
8
8
9
9
9
11
CHAPTER 3 DATA TYPE .................................................................................................................
3.1
Data Format ...........................................................................................................................
3.1.1
Data type and addressing ...........................................................................................................
3.2
Data Representation .............................................................................................................
3.2.1
Integer .........................................................................................................................................
3.2.2
Unsigned integer .........................................................................................................................
3.2.3
Bit ................................................................................................................................................
3.3
Data Alignment......................................................................................................................
13
13
13
14
14
15
15
15
CHAPTER 4 ADDRESS SPACE.......................................................................................................
4.1
Memory Map ..........................................................................................................................
4.2
Addressing Mode..................................................................................................................
4.2.1
Instruction address ......................................................................................................................
4.2.2
Operand address ........................................................................................................................
17
18
19
19
22
CHAPTER 5 INSTRUCTION ..............................................................................................................
5.1
Instruction Format ................................................................................................................
5.2
Outline of Instructions..........................................................................................................
5.3
Instruction Set.......................................................................................................................
5.4
Number of Instruction Execution Clock Cycles.................................................................
25
25
28
32
90
CHAPTER 6 INTERRUPT AND EXCEPTION..................................................................................
6.1
Interrupt Servicing ................................................................................................................
6.1.1
Maskable interrupt.......................................................................................................................
6.1.2
Non-maskable interrupt ...............................................................................................................
6.2
Exception Processing ..........................................................................................................
6.2.1
Software exception......................................................................................................................
6.2.2
Exception trap .............................................................................................................................
6.3
Restoring from Interrupt/Exception ....................................................................................
93
94
94
96
97
97
98
99