參數(shù)資料
型號(hào): μPD4564441
廠商: NEC Corp.
英文描述: 64M-bit Synchronous DRAM(64M同步動(dòng)態(tài)RAM)
中文描述: 6400位同步DRAM(6400同步動(dòng)態(tài)RAM)的
文件頁數(shù): 15/84頁
文件大?。?/td> 697K
代理商: ΜPD4564441
15
μ
PD4564441, 4564841, 4564163 for Rev. E
4. Truth Table
4.1 Command Truth Table
Function
Symbol
CKE
/CS
/RAS
/CAS
/WE
A12,
A10
A11,
n – 1
n
A13
A9 - A0
Device deselect
DESL
H
×
H
×
×
×
×
×
×
No operation
NOP
H
×
L
H
H
H
×
×
×
Burst stop
BST
H
×
L
H
H
L
×
×
×
Read
READ
H
×
L
H
L
H
V
L
V
Read with auto precharge
READA
H
×
L
H
L
H
V
H
V
Write
WRIT
H
×
L
H
L
L
V
L
V
Write with auto precharge
WRITA
H
×
L
H
L
L
V
H
V
Bank activate
ACT
H
×
L
L
H
H
V
V
V
Precharge select bank
PRE
H
×
L
L
H
L
V
L
×
Precharge all banks
PALL
H
×
L
L
H
L
×
H
×
Mode register set
MRS
H
×
L
L
L
L
L
L
V
Remark
H = High level, L = Low level,
×
= High or Low level (Don't care), V = Valid data input
4.2 DQM Truth Table
Function
Symbol
CKE
DQM
n – 1
n
U
L
Data write / output enable
ENB
H
×
L
Data mask / output disable
MASK
H
×
H
Upper byte write enable / output enable
ENBU
H
×
L
×
Lower byte write enable / output enable
ENBL
H
×
×
L
Upper byte write inhibit / output disable
MASKU
H
×
H
×
Lower byte write inhibit / output disable
MASKL
H
×
×
H
Remark
H = High level, L = Low level,
×
= High or Low level (Don't care)
4.3 CKE Truth Table
Current state
Function
Symbol
CKE
/CS
/RAS
/CAS
/WE
Address
n – 1
n
Activating
Clock suspend mode entry
H
L
×
×
×
×
×
Any
Clock suspend mode
L
L
×
×
×
×
×
Clock suspend
Clock suspend mode exit
L
H
×
×
×
×
×
Idle
CBR refresh command
REF
H
H
L
L
L
H
×
Idle
Self refresh entry
SELF
H
L
L
L
L
H
×
Self refresh
Self refresh exit
L
H
L
H
H
H
×
L
H
H
×
×
×
×
Idle
Power down entry
H
L
×
×
×
×
×
Power down
Power down exit
L
H
×
×
×
×
×
Remark
H = High level, L = Low level,
×
= High or Low level (Don't care)
相關(guān)PDF資料
PDF描述
μPD4564841 64M-bit Synchronous DRAM(64M同步動(dòng)態(tài)RAM)
μPD4564323 64M-bit Synchronous DRAM(64M 同步動(dòng)態(tài)RAM)
μPD45D128164 128 M-bit Synchronous DRAM with Double Data Rate(128 同步動(dòng)態(tài)RAM)
μPD45D128442 128 M-bit Synchronous DRAM with Double Data Rate(128 同步動(dòng)態(tài)RAM)
μPD45D128842 128 M-bit Synchronous DRAM with Double Data Rate(128 同步動(dòng)態(tài)RAM)
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