參數(shù)資料
型號: μPD4516421A
廠商: NEC Corp.
英文描述: 16M-bit Synchronous DRAM(16M 同步動態(tài)RAM)
中文描述: 1,600位同步DRAM(1,600同步動態(tài)RAM)的
文件頁數(shù): 33/86頁
文件大?。?/td> 904K
代理商: ΜPD4516421A
μ
PD4516421A, 4516821A, 4516161A for Rev. P
33
12.2 Precharge Termination
12.2.1 Precharge Termination in READ Cycle
During a read cycle, the burst read operation is terminated by a precharge command.
When the precharge command is issued, the burst read operation is terminated and precharge starts.
The same bank can be activated again after t
RP
from the precharge command.
When CAS latency is 2, the read data will remain valid until one clock after the precharge command.
Read
CLK
T0
T2
T1
T3
T4
T5
T6
T7
Burst length = X, CAS latency = 2
Q1
DQ
Command
Q2
Q3
Q4
ACT
t
RP
PRE
Hi-Z
(t
RAS
must be satisfied)
When CAS latency is 3, the read data will remain valid until two clocks after the precharge command.
Read
CLK
T0
T2
T1
T3
T4
T5
T6
T7
Burst length = X, CAS latency = 3
DQ
Command
Q1
Q2
Q3
ACT
t
RP
PRE
Hi-Z
T8
(t
RAS
must be satisfied)
Q4
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