Z90T366 ROM and Z90T361 OTP
eZVision 64 KWord Television Controller with OSD
PS005901-1100
vi
List of Tables
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Z90T366 or Z90T361 Pin Description .........................................................5
Internal Registers ........................................................................................9
Status Register ...........................................................................................9
Ram Pointer Loop Description ..................................................................10
Additional Control Registers .....................................................................13
Reset Conditions ......................................................................................18
ADC Inputs Typical Range .......................................................................24
Master I2C Bus Bit Rates .........................................................................27
Master I2C Bus Interface Commands .......................................................28
Slave I2C Bus Interface Commands .........................................................29
Character Expansion Register ..................................................................36
Attribute Assignment .................................................................................38
Cursor Parameters ...................................................................................40
Memory Allocation for Cursor Bitmap .......................................................41
Fixed Palette Color Assignment ...............................................................43
R4(1)<e:d> Settings ..................................................................................45
Register Summary ....................................................................................46
Bank Assignments ....................................................................................47
Register1, Bank0, Cursor Palette .............................................................48
Register2, Bank0, PLL Frequency Data Register .....................................48
Register3, Bank0, I2C Interface Register .................................................50
Register5, Bank0, Port 1 Data Register ....................................................51
Register4, Bank0, Port 0 Data Register ....................................................51
Register6, Bank0, Port 0 Direction Register .............................................52
Register7, Bank0, Port 1 Direction Register .............................................52
Register0, Bank1, Clamp Position Register ..............................................53
Register1, Bank1, Speed Control Register ...............................................55
Register2, Bank1, WDT/STOP (write only) and
9-bit Counter (read only) Control Register .......................................58
Register3, Bank1, Standard Control Register ...........................................58
Register4, Bank1, ADC Control Register ..................................................60
Register5, Bank1,Timer Control Register .................................................61
Register6, Bank1, Clock Switch Control Register .....................................63
Register7, Bank1, Interrupts/WDT/SMR Control Register ........................66
Interrupt Priority ........................................................................................67
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30
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32
33
34