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參數(shù)資料
| 型號： | Z86L9808SSC |
| 英文描述： | Triac; Triac Type:Internally Triggered; Peak Repetitive Off-State Voltage, Vdrm:600V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:25uA; Package/Case:TO-220; Gate Trigger Current Max, Igt:1.5A |
| 中文描述： | 單片機| 8位| Z8的CPU |的CMOS |專科| 28腳|塑料 |
| 文件頁數(shù)： | 65/87頁 |
| 文件大?。?/td> | 1182K |
| 代理商： | Z86L9808SSC |
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Z86L81/86/98
28-Pin Low-Voltage Infrared Microcontrollers
PS006403-0502
59
SMR2 (0F) DH
Figure 32. Stop-Mode Recovery Register 2 ((0F) DH:D2–D4, D6 Write Only)
If SMR2 is used in conjunction with SMR, either of the specified events causes a
Stop-Mode Recovery.
Port pins configured as outputs are ignored as an SMR or
SMR2 recovery source. For example, if the NAND or P23–P20
is selected as the recovery source and P20 is configured as an
output, the remaining SMR pins (P23–P21) form the NAND
equation.
D7
D6
D5
D4
D3
D2
D1
D0
Reserved (Must be 0)
Reserved (Must be 0)
Stop-Mode Recovery Source 2
000 POR Only *
001 NAND P20, P21, P22, P23
010 NAND P20, P21, P22, P23, P24, P25, P26
011 NOR P31, P32, P33
100 NAND P31, P32, P33
101 NOR P31, P32, P33, P00, P07
110 NAND P31, P32, P33, P00, P07
111 NAND P31, P32, P33, P20, P21, P22
Reserved (Must be 0)
Recovery Level * *
0 Low
1 High
Reserved (Must be 0)
Note: If used in conjunction with SMR, either of the two specified events causes a Stop-Mode Recovery.
* Default setting after reset
* * At the XOR gate input
Note:
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