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參數(shù)資料
| 型號(hào)： | Z86L9808SSC |
| 英文描述： | Triac; Triac Type:Internally Triggered; Peak Repetitive Off-State Voltage, Vdrm:600V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:25uA; Package/Case:TO-220; Gate Trigger Current Max, Igt:1.5A |
| 中文描述： | 單片機(jī)| 8位| Z8的CPU |的CMOS |?？苵 28腳|塑料 |
| 文件頁數(shù)： | 42/87頁 |
| 文件大?。?/td> | 1182K |
| 代理商： | Z86L9808SSC |
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Z86L81/86/98
28-Pin Low-Voltage Infrared Microcontrollers
PS006403-0502
36
Counter_INT_Mask
This bit is set to allow an interrupt when T16 times out.
P35_Out
This bit defines whether P35 is used as a normal output pin or T16 output.
SMR2 Stop-Mode Recovery Register 2
Table 13 lists and briefly describes the fields for this register.
Counter/Timer Functional Blocks
Input Circuit
The edge detector monitors the input signal on P31 or P20. Based on CTR1 D5–
D4, a pulse is generated at the Pos Edge or Neg Edge line when an edge is
detected. Glitches in the input signal that have a width less than specified (CTR1
D3, D2) are filtered out (see Figure 14).
Table 13.SMR2(F)0Dh: Stop-Mode Recovery Register 2
Field
Reserved
Recovery Level
Bit Position
7-------
-6------
Value
0
0*
1
0
000*
001
010
011
100
101
110
111
00
Description
Reserved (Must be 0)
Low
High
Reserved (Must be 0)
A. POR Only
B. NAND of P23–P20
C. NAND of P27–P20
D. NOR of P33–P31
E. NAND of P33–P31
F. NOR of P33-P31, P00, P07
G. NAND of P33-P31, P00, P07
H. NAND of P33-P31, P22–P20
Reserved (Must be 0)
W
Reserved
Source
--5-----
---432--
W
Reserved
Notes:
* Indicates the value upon Power-On Reset
------10
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PDF描述 |
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| Z86M1720ASC | Triac; Triac Type:Standard; Peak Repetitive Off-State Voltage, Vdrm:600V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:50mA; Package/Case:3-TO-220; Current, It av:10A; Holding Current:50mA |
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| Z87000-16FSC | RF/Baseband Circuit |
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