參數(shù)資料
型號： XRT94L31_07
廠商： Exar Corporation
英文描述： 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
中文描述： 3通道DS3/E3/STS-1給STS-3/STM-1映射器集成電路
文件頁數(shù)： 17/133頁
文件大?。?/td> 1014K
代理商： XRT94L31_07
XRT94L31
17
REV. 1.0.1
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
E2
TXA_ALARM
O
CMOS
Transmit STS-3/STM-1 Telecom Bus - Alarm Indicator Output sig-
nal:
This output pin pulses "High", coincdent to the instant that the Transmit
STS-3/STM-1 Telecom Bus outputs a byte (via the TxA_D[7:0] output
pins) that pertains to any that STS-1 or STS-3c signal is carrying the
AIS-P indicator.
This output pin is "Low" for all other conditions.
N
OTE
:
This output pin is only active if the Transmit STS-3/STM-1
Telecom Bus Interface is enabled and has been configured to
operate in the Re-Phase OFF Mode.
H3
TXA_DP
O
CMOS
Transmit STS-3/STM-1 Telecom Bus - Parity Output pin:
This output pin can be configured to function as one of the following.To
reflect either the EVEN or ODD parity value of the bits which are cur-
rently being output via the TXA_D[7:0] output pins.
To reflect either the EVEN or ODD parity value of the bits which are cur-
rently being output via the TXA_D[7:0] output pins and the states of the
TXA_PL and TXA_C1J1 output pins.
N
OTE
:
Any one of these configuration selections can be made by writing
the appropriate value into the Telecom Bus Control Register
(Address Location = 0x0137).
G4
TxSBFP
I
TTL
Transmit STS-3/STM-1 Frame Alignment Sync Input:
The Transmit STS-3 TOH Processor Block can be configured to initiate
its generation of a new outbound STS-3/STM-1 frame based upon an
externally supplied 8kHz clock signal to this input pin. If this feature is
used, the Transmit STS-3/STM-1 Telecom Bus Interface will begin trans-
mitting the very first byte of given STS-3 or STM-1 frame, upon sensing
a rising edge (of the 8kHz signal) at this input pin.
N
OTES
:
1.
If this input pin is connected to GND, then the Transmit STS-3
TOH Processor block will generate its outbound STS-3/STM-1
frames asynchronously, with respect to any input signal.
2.
This input signal must be synchronized with the signal that is
supplied to the REFTTL input pin. Failure to insure this will
result in bit errors being generated within the outbound STS-3/
STM-1 signal.
3.
The user must supply an 8kHz pulse (to this input pin) that has
a width of approximately 51.4412.8ns (one 19.44MHz clock
period). The user must not apply a 50% duty cycle 8kHz signal
to this input pin.
4.
Register HRSYNC_DLY (Address Location: 0x0135) defines
the timing for TxSBFP input pin.
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
相關PDF資料
PDF描述
XRT94L31 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER
XRT94L31IB 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER
XRT94L43A SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
XRT94L43 SONET/SDH STS-12/STM-4 TO E3/DS3/STS-1 MAPPER/DEMAPPER
XRT94L43IB SONET/SDH STS-12/STM-4 TO E3/DS3/STS-1 MAPPER/DEMAPPER
相關代理商/技術參數(shù)
參數(shù)描述
XRT94L31ES-L04 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT94L31IB 功能描述:網(wǎng)絡控制器與處理器 IC Demapper RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT94L31IB-F 功能描述:網(wǎng)絡控制器與處理器 IC Demapper RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT94L31IB-L 功能描述:網(wǎng)絡控制器與處理器 IC Mapper / Demapper RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT94L33 制造商:EXAR 制造商全稱:EXAR 功能描述:-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - SONET REGISTERS
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