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XRT83SH314
86
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.4
TABLE 49: MICROPROCESSOR REGISTER 0XE7H BIT DESCRIPTION
TABLE 50: MICROPROCESSOR REGISTER 0XE8H BIT DESCRIPTION
GLOBAL REGISTER (0XE7H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used
R/W
0
D6
Reserved
This Register Bit is Not Used
R/W
0
D5
Reserved
This Register Bit is Not Used
R/W
0
D4
Reserved
This Register Bit is Not Used
R/W
0
D3
Reserved
This Register Bit is Not Used
R/W
0
D2
Reserved
This Register Bit is Not Used
R/W
0
D1
Reserved
This Register Bit is Not Used
R/W
0
D0
Reserved
This Register Bit is Not Used
R/W
0
GLOBAL REGISTER (0XE8H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
D6
D5
D4
D3
D2
D1
D0
LCVCNT7
LCVCNT6
LCVCNT5
LCVCNT4
LCVCNT3
LCVCNT2
LCVCNT1
LCVCNT0
Line Code Violation Byte Contents
These bits contain the LCV counter contents of the Byte selected
by bit D2 in register 0xE6h for a given channel. The channel is
addressed by using bits D[3:0] in register 0xE5h. By default, the
contents contain the LSB, however no channel is selected..
RO