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XRT83SH314

14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT

REV. 1.0.4

2.2

Clock and Data Recovery

The receive clock (RCLK) is recovered by the clock and data recovery circuitry. An internal PLL locks on the

incoming data stream and outputs a clock that’s in phase with the incoming signal. This allows for multi-

channel T1/E1/J1 signals to arrive from different timing sources and remain independent. In the absence of an

incoming signal, RCLK maintains its timing by using the internal master clock as its reference. The recovered

data can be updated on either edge of RCLK. By default, data is updated on the rising edge of RCLK. To

update data on the falling edge of RCLK, set RCLKE to "1" in the appropriate global register. Figure 6 is a

timing diagram of the receive data updated on the rising edge of RCLK. Figure 7 is a timing diagram of the

receive data updated on the falling edge of RCLK. The timing specifications are shown in Table 4.

FIGURE 6. RECEIVE DATA UPDATED ON THE RISING EDGE OF RCLK

FIGURE 7. RECEIVE DATA UPDATED ON THE FALLING EDGE OF RCLK

RCL K

RP O S

RNE G

RCL K

RC L K

RCLK

RPOS

RNEG

RCLK

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
XRT83SH314IB-SAK	制造商:Exar Corporation 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT 制造商:EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH38	制造商:EXAR 制造商全稱:EXAR 功能描述:8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH38_0609	制造商:EXAR 制造商全稱:EXAR 功能描述:8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH38ES	功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 8 CHT1/E1LIUSH RoHS:否制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83SH38IB	功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray

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