- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9996 > XRT83L34IV (Exar Corporation)IC LIU T1/E1/J1 QUAD 128TQFP PDF資料下載
參數(shù)資料
| 型號： | XRT83L34IV |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 54/99頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU T1/E1/J1 QUAD 128TQFP |
| 標(biāo)準(zhǔn)包裝： | 72 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 4/4 |
| 規(guī)程： | T1，E1，J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應(yīng)商設(shè)備封裝： | 128-TQFP（14x20） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁當(dāng)前第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁
XRT83L34
xr
REV. 1.0.1
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
55
the XRT83L34 device). In this case, the Microprocessor should continue to hold the "Write Strobe" (WR*/
R/W*) input pin "LOW" until it detects the "RDY*/DTACK*" output pin toggling "HIGH".
8. After waiting the appropriate amount of time for the data (on the Bi-Directional Data Bus) to stabilize and
can be safely accepted by the Microprocessor Interface block circuitry (within the XRT83L34 device); the
XRT83L34 device will indicate that this data can be latched into the "target" address location by toggling
the RDY*/DTACK* output pin "LOW".
9. After the Microprocessor detects the RDY*/DTACK* signal (from the XRT83L34 device) toggling "LOW", it
can then terminate the WRITE cycle by toggling the WR*/R/W* (Write Strobe) input pin "HIGH".
NOTE: Once the user toggles the "WR*/R/W* (Write Strobe) input pin "HIGH", then the Microprocessor Interface (of the
XRT83L34 device) will latch the contents of the Bi-Directional Data Bus (D[7:0]) into the "target" address location o
of the chip.
Figure _ presents a timing diagram that illustrates the behavior of the Microprocessor Interface signals during
an Intel-Asynchronous Mode Write Operation.
OPERATING THE MICROPROCESSOR INTERFACE IN THE MOTOROLA-ASYNCHRONOUS MODE
If the Microprocessor Interface has been configured to operate in the Motorola-Asynchronous Mode, then the
following Microprocessor Interface pins will assume the role that is described below in Table _.
FIGURE 26. ILLUSTRATION OF AN INTEL-ASYNCHRONOUS MODE WRITE OPERATION
ALE/AS
RD*/DS*
A[6:0]
CS*
D[7:0]
RDY/DTACK*
Data to be Written
Address of Target Register
WR*/R/W*
Microprocessor places “target”
Address value on A[6:0]
Address Decoding
Circuitry asserts
CS*
RDY* toggles “l(fā)ow” to indicate that
Valid data can be latched into “target”
Address location of chip
Write Operation begins
Here
RDY* toggles “high”
after Completion
Of Write Operation
Write Operation is
Terminated Here
Microprocessor Interface latches contents on
A[6:0] upon falling edge of ALE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MS27508E10F98SC | CONN RCPT 6POS BOX MNT W/SCKT |
| VI-21W-MX-F1 | CONVERTER MOD DC/DC 5.5V 75W |
| MS27468T15A97P | CONN RCPT 12POS JAM NUT W/PINS |
| MS27508E10B98SB | CONN RCPT 6POS BOX MNT W/SCKT |
| IDT72V243L7-5BCI | IC FIFO 2048X18 7-5NS 100BGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83L34IV-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT83L34IVTR | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83L34IVTR-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83L38 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。