參數(shù)資料
型號(hào): XRT75R06DIB-F
廠商: Exar Corporation
文件頁(yè)數(shù): 63/105頁(yè)
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 6CH 217BGA
標(biāo)準(zhǔn)包裝: 126
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 6/6
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 217-BBGA
供應(yīng)商設(shè)備封裝: 217-BGA(23x23)
包裝: 托盤(pán)
XRT75R06D
á
REV. 1.0.0
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
55
0x06 (ch 0)
0x16 (ch 1)
0x26 (ch 2)
0x36 (ch 3)
0x46 (ch 4)
0x56 (ch 5)
R/W
Block Con-
trol
D0
SR/DR_n
Setting this bit configures the Receiver and Trans-
mitter in Single-Rail (NRZ) mode.
NOTE: See section 4.0 for detailed description.
0
D1
STS-1/
DS3_n
Setting this bit configures the channel into STS-1
mode.
NOTE: This bit field is ignored if the channel is con-
figured to operate in E3 mode.
0
D2
E3_n
Setting this bit configures the channel in E3 mode.
0
D3
LLB_n
Setting this bit configures the channel in Local Loop-
back mode.
0
D4
RLB_n
This bit along with LLB_n determine the diagnostic
mode as shown in the table below.
0
D5
PRBSEN_
n
Setting this bit enables the PRBS generator/detec-
tor. When in E3 mode, an unframed 223-1 pattern is
used. For DS3 and STS-1, unframed 215-1 pattern is
used. This mode of operation will use TCLK for tim-
ing. One should insure that a stable frequency is
provided. Looping this signal back to its own receive
channel and using RCLK to generate TCLK will
cause an unstable condition and should be avoided.
0
D6
CLKOUTE
N_n
Set this bit to enable the CLKOUTs on a per channel
basis. The frequency of the output clock is depen-
dent on the configuration of the channels, either E3,
DS3 or STS-1.
0
D7
Reserved
TABLE 18: REGISTER MAP DESCRIPTION - CHANNEL N
ADDRESS
(HEX)
TYPE
REGISTER
NAME
BIT#
SYMBOL
DESCRIPTION
DEFAULT
VALUE
RLB_n
0
Loopback Mode
Normal Operation
Analog Local
LLB_n
0
1
Remote
Digital
0
1
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