參數(shù)資料
型號： XRT75R06DIB-F
廠商： Exar Corporation
文件頁數(shù)： 105/105頁
文件大?。?/td> 0K
描述： IC LIU E3/DS3/STS-1 6CH 217BGA
標準包裝： 126
類型： 線路接口裝置（LIU）
驅動器/接收器數(shù)： 6/6
規(guī)程： DS3，E3，STS-1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 217-BBGA
供應商設備封裝： 217-BGA（23x23）
包裝： 托盤
á
XRT75R06D
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
REV. 1.0.0
94
that are responsible for acquiring and maintaining DS1 or DS3 frame synchronization (with these DS1 or DS3
data-streams that have been de-mapped from SONET) must have re-acquired DS1 or DS3 frame
synchronization within 50ms" after APS has been initiated."
The LIU was designed such that the DS3 signals that it receives from a SONET Mapper device and processes
will comply with the Category I Intrinsic Jitter requirements per Telcordia GR-253-CORE.
Reference 1 documents some APS Recovery Time testing, which was performed to verify that the Jitter
Attenuator blocks (within the LIU) device that permit it to comply with the Category I Intrinsic Jitter
Requirements (for DS3 Applications) per Telcordia GR-253-CORE, do not cause it to fail to comply with the
"APS Completion Time" requirements per Section 5.3.3.3 of Telcordia GR-253-CORE.
However, Table 3
presents a summary of some APS Recovery Time requirements that were documented within this test report.
Table 3,
NOTE: The APS Completion (or Recovery) time requirement is 50ms.
Configuring the LIU to be able to comply with the SONET APS Recovery Time Requirements of 50ms
Quite simply, the user can configure a given Jitter Attenuator block (associated with a given channel) to (1)
comply with the "APS Completion Time" requirements per Telcordia GR-253-CORE, and (2) also comply with
the "Category I Intrinsic Jitter Requirements per Telcordia GR-253-CORE (for DS3 applications) by making
sure that Bit 4 (SONET APS Recovery Time Disable Ch_n), within the Jitter Attenuator Control Register is set
to "0" as depicted below.
TABLE 21: MEASURED APS RECOVERY TIME AS A FUNCTION OF DS3 PPM OFFSET
DS3 PPM OFFSET (PER W&G ANT-20SE)
MEASURED APS RECOVERY TIME (PER LOGIC ANALYZER)
-99 ppm
1.25ms
-40ppm
1.54ms
-30 ppm
1.34ms
-20 ppm
1.49ms
-10 ppm
1.30ms
0 ppm
1.89ms
+10 ppm
1.21ms
+20 ppm
1.64ms
+30 ppm
1.32ms
+40 ppm
1.25ms
+99 ppm
1.35ms
JITTER ATTENUATOR CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X07
CHANNEL 1 ADDRESS LOCATION = 0X0F
CHANNEL 2 ADDRESS LOCATION = 0X17
BIT 7BIT 6BIT 5
BIT 4BIT 3BIT 2BIT 1BIT 0
Unused
SONET APS
Recovery
Time Disable
Ch_n
JA RESET
Ch_n
JA1 Ch_n
JA in Tx Path
Ch_n
JA0 Ch_n
相關PDF資料
PDF描述
XRT75R06IB-F IC LIU E3/DS3/STS-1 6CH 217BGA
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XRT75R12IB-L IC LIU E3/DS3/STS-1 12CH 420TBGA
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相關代理商/技術參數(shù)
參數(shù)描述
XRT75R06ES 功能描述:時鐘合成器/抖動清除器 6CH T3/E3/STS1LIU+JA 3.3V W/REDUNDANCY RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75R06IB 功能描述:外圍驅動器與原件 - PCI 6CH E3/DS3/STS1 LIU+Jitter Attenuato RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75R06IB208 制造商:Exar Corporation 功能描述:Line Interface Unit 51.84Mbps DS3/E3/STS-1 Parallel 217-Pin BGA
XRT75R06IB-F 功能描述:外圍驅動器與原件 - PCI 6 Channel 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75R12 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
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