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參數(shù)資料
| 型號： | XRT7300IVTR |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 55/55頁 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 SGL 44TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 帶卷 (TR) |
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XRT7300
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.1.2
5
16
STS-1/DS3
I
STS-1/DS3 Select Input:
A “High” on this pin configures the Clock Recovery Phase Locked Loop to set its
VCO Center frequency to around 51.84 MHz (optimal for SONET STS-1 opera-
tions). A “Low” on this pin configures the Clock Recovery Phase Locked Loop to
set its VCO Center frequency to around 44.736 MHz (optimal for DS3 opera-
tions).
NOTES:
1. The XRT7300 ignores this pin if the E3 pin (pin 17) is set to “1”.
2. This input pin is ignored if the XRT7300 is operating in the HOST Mode.
3. Tie this pin to GND if the XRT7300 is going to be operating in the HOST
Mode.
17
E3
I
E3 Select Input:
A “High” on this pin configures the XRT7300 to operate in the E3 Mode.
A “Low” on this pin configures the XRT7300 to check the state of the STS-1/DS3
input pin.
NOTES:
1. This input pin is ignored if the XRT7300 is operating in the HOST Mode.
2. Tie this pin to GND if the XRT7300 is going to be operating in the HOST
Mode.
18
HOST/HW
I
HOST/HW Mode Select:
This input pin is used to enable or disable the Microprocessor Serial Interface
(e.g., consisting of the SDI, SDO, SCLK, CS and REGRESET pins).
Setting this input pin “High” enables the Microprocessor Serial Interface (e.g.
configures the XRT7300 to operate in the HOST Mode). In this mode, the
XRT7300 is configured by writing data into the on-chip Command Registers via
the Microprocessor Serial Interface. When the XRT7300 is operating in the
HOST Mode, it ignores the states of many of the discrete input pins.
Setting this input pin “Low” disables the Microprocessor Serial Interface (e.g.,
configures the XRT7300 to operate in the Hardware Mode). In this mode, many
of the external input control pins are functional.
19
SDI/
(LOSMUTEN)
I
Serial Data Input for the Microprocessor Serial Interface (HOST Mode) or
MUTE-upon-LOS Enable Input (Hardware Mode):
The function of this input pin depends upon whether the XRT7300 is operating in
the HOST or the Hardware Mode.
Serial Data Input for the Microprocessor Serial Interface (HOST Mode):
This pin is used to read or write data into the Command Registers of the Micro-
processor Serial Interface. The Read/Write bit, the Address Values of the Com-
mand Registers and Data Value to be written during Write Operations are
applied to this pin.
This input is sampled on the rising edge of the SCLK pin (pin 21).
MUTE-upon-LOS Enable Input (Hardware Mode):
When in the Hardware Mode, this input pin is used to configure the XRT7300 to
MUTE the recovered data via the RPOS and RNEG output pins whenever it
declares an LOS condition.
Setting this input pin “High” configures the XRT7300 to automatically pull the
RPOS and RNEG output pins to GND whenever it is declaring an LOS condition,
thereby MUTing the data being output to the Terminal Equipment.
Setting this input pin “Low” configures the XRT7300 to NOT automatically MUTE
the recovered data whenever an LOS condition is declared.
PIN DESCRIPTION
PIN #SYMBOL
TYPE
DESCRIPTION
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