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參數(shù)資料
| 型號(hào)： | XRT7300IVTR |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 32/55頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E3/DS3/STS-1 SGL 44TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 帶卷 (TR) |
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XRT7300
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.1.2
34
Whenever the XRT7300 delivers Dual-Rail format to
the Terminal Equipment it does so via the following
output signals.
RPOS
RNEG
RCLK1
RCLK2
Figure 23 illustrates the typical interface for the trans-
mission of data in a Dual-Rail Format from the Re-
ceive Section of the XRT7300 to the Receiving Termi-
nal Equipment.
The manner that the LIU transmits Dual-Rail data to
the Receiving Terminal Equipment is described below
and illustrated in Figure 24. The XRT7300 typically
updates the data on the RPOS and RNEG output
pins on the rising edge RCLK1 (or RCLK2).
RCLK1 (or RCLK2) is the Recovered Clock signal
from the incoming Received line signal. As a result,
these clock signals are typically 34.368 MHz for E3
applications, 44.736 MHz for DS3 applications and
51.84 MHz for SONET STS-1 applications.
In general, if the XRT7300 received a positive-polarity
pulse in the incoming line signal via the RTIP and
RRING input pins, then the XRT7300 pulses the
RPOS output pin “High”. If the XRT7300 received a
negative-polarity pulse in the incoming line signal via
the RTIP and RRING input pins, then the XRT7300
pulses the RNEG output pin “High”.
Inverting the RCLK1 or RCLK2 outputs
When using the XRT7300, either of the RCLK1 or
RCLK2 signals can be inverted with respect to the
delivery of the RPOS and RNEG output signals to the
Receiving Terminal Equipment. This feature may be
useful for those customers whose Receiving Terminal
Equipment logic design is such that the RPOS and
RNEG data must be sampled on the rising edge of
RCLK1 or RCLK2. Figure 25 illustrates the behavior
FIGURE 23. THE TYPICAL INTERFACE FOR THE TRANSMISSION OF DATA IN A DUAL-RAIL FORMAT FROM THE
RECEIVE SECTION OF THE XRT7300 TO THE RECEIVING TERMINAL EQUIPMENT
Exar E3/DS3/STS-1 LIU
Receive
Logic
Block
RxPOS
RxNEG
RCLK1, 2
RPOS
RNEG
RCLK1, 2
Terminal
Equipment
(E3/DS3 or STS-1
Framer)
FIGURE 24. HOW THE XRT7300 OUTPUTS DATA ON THE RPOS AND RNEG OUTPUT PINS
RCLK1
RPOS
RNEG
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| XRT7300IVTR-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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| XRT73L00AES | 功能描述:界面開發(fā)工具 Eval System for XRT73L00A Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
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