
XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
II
B
LOCK
I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
04)..........................................................................52
B
LOCK
I
NTERRUPT
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
05)..........................................................................53
TEST R
EGISTER
(A
DDRESS
= 0
X
0C).........................................................................................................53
R
X
DS3 C
ONFIGURATION
& S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
10).............................................................55
R
X
DS3 S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
11)..........................................................................................56
R
X
DS3 I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
12).........................................................................57
R
X
DS3 I
NTERRUPT
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
13).........................................................................58
R
X
DS3 SYNC D
ETECT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
14)..................................................................59
R
X
DS3 FEAC I
NTERRUPT
E
NABLE
/S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
17).................................................60
R
X
DS3 LAPD C
ONTROL
R
EGISTER
(A
DDRESS
= 0
X
18).............................................................................61
R
X
DS3 LAPD S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
19)................................................................................61
2.3.3 Receive E3 Framer Configuration Registers (ITU-T G.832)................................................................... 62
R
X
E3 C
ONFIGURATION
& S
TATUS
R
EGISTER
1 (A
DDRESS
= 0
X
10).............................................................63
R
X
E3 C
ONFIGURATION
& S
TATUS
R
EGISTER
2 (A
DDRESS
= 0
X
11).............................................................64
R
X
E3 I
NTERRUPT
E
NABLE
R
EGISTER
1 (A
DDRESS
= 0
X
12)........................................................................65
R
X
E3 I
NTERRUPT
E
NABLE
R
EGISTER
2 (A
DDRESS
= 0
X
13)........................................................................66
R
X
E3 I
NTERRUPT
S
TATUS
R
EGISTER
1 (A
DDRESS
= 0
X
14)........................................................................67
R
X
E3 I
NTERRUPT
S
TATUS
R
EGISTER
2 (A
DDRESS
= 0
X
15)........................................................................68
R
X
E3 LAPD C
ONTROL
R
EGISTER
(A
DDRESS
= 0
X
18)................................................................................69
R
X
E3 LAPD S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
19) ..................................................................................70
R
X
E3 NR B
YTE
R
EGISTER
(A
DDRESS
= 0
X
1A)..........................................................................................71
R
X
E3 GC B
YTE
R
EGISTER
(A
DDRESS
= 0
X
1B)..........................................................................................71
R
X
E3 TTB-0 R
EGISTER
(A
DDRESS
= 0
X
1C)..............................................................................................72
R
X
E3 TTB-1 R
EGISTER
(A
DDRESS
= 0
X
1D)..............................................................................................72
R
X
E3 TTB-2 R
EGISTER
(A
DDRESS
= 0
X
1E) ..............................................................................................72
R
X
E3 TTB-3 R
EGISTER
(A
DDRESS
= 0
X
1F) ..............................................................................................73
R
X
E3 TTB-4 R
EGISTER
(A
DDRESS
= 0
X
20)...............................................................................................73
R
X
E3 TTB-5 R
EGISTER
(A
DDRESS
= 0
X
21)...............................................................................................73
R
X
E3 TTB-6 R
EGISTER
(A
DDRESS
= 0
X
22)...............................................................................................73
R
X
E3 TTB-7 R
EGISTER
(A
DDRESS
= 0
X
23)...............................................................................................74
R
X
E3 TTB-8 R
EGISTER
(A
DDRESS
= 0
X
24)...............................................................................................74
R
X
E3 TTB-9 R
EGISTER
(A
DDRESS
= 0
X
25)...............................................................................................74
R
X
E3 TTB-10 R
EGISTER
(A
DDRESS
= 0
X
26).............................................................................................75
R
X
E3 TTB-11 R
EGISTER
(A
DDRESS
= 0
X
27).............................................................................................75
R
X
E3 TTB-12 R
EGISTER
(A
DDRESS
= 0
X
28).............................................................................................75
R
X
E3 TTB-13 R
EGISTER
(A
DDRESS
= 0
X
29).............................................................................................75
R
X
E3 TTB-14 R
EGISTER
(A
DDRESS
= 0
X
2A) ............................................................................................76
R
X
E3 TTB-15 R
EGISTER
(A
DDRESS
= 0
X
2B) ............................................................................................76
R
X
E3
SSM
R
EGISTER
(A
DDRESS
= 0
X
2C)..................................................................................................76
2.3.4 Receive E3 Framer Configuration Registers (ITU-T G.751)................................................................... 77
R
X
E3 C
ONFIGURATION
& S
TATUS
R
EGISTER
1 (A
DDRESS
= 0
X
10).............................................................77
R
X
E3 C
ONFIGURATION
& S
TATUS
R
EGISTER
2 (A
DDRESS
= 0
X
11).............................................................77
R
X
E3 I
NTERRUPT
E
NABLE
R
EGISTER
1 (A
DDRESS
= 0
X
12)........................................................................79
R
X
E3 I
NTERRUPT
E
NABLE
R
EGISTER
2 (A
DDRESS
= 0
X
13)........................................................................79
R
X
E3 I
NTERRUPT
S
TATUS
R
EGISTER
1 (A
DDRESS
= 0
X
14)........................................................................80
R
X
E3 I
NTERRUPT
S
TATUS
R
EGISTER
2 (A
DDRESS
= 0
X
15)........................................................................81
R
X
E3 LAPD C
ONTROL
R
EGISTER
(A
DDRESS
= 0
X
18)................................................................................82
R
X
E3 LAPD S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
19) ..................................................................................82
R
X
E3 S
ERVICE
B
IT
R
EGISTER
(A
DDRESS
= 0
X
1A).....................................................................................83
2.3.5 Transmit DS3 Configuration Registers................................................................................................... 84
T
RANSMIT
DS3 C
ONFIGURATION
R
EGISTER
(A
DDRESS
= 0
X
30)..................................................................84
T
RANSMIT
DS3 FEAC C
ONFIGURATION
& S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
31).......................................86
T
X
DS3 FEAC R
EGIS
T
ER
(A
DDRESS
= 0
X
32) ............................................................................................87
T
X
DS3 LAPD C
ONFIGURATION
R
EGISTER
(A
DDRESS
= 0
X
33) ...................................................................87
T
X
DS3 LAPD S
TATUS
AND
I
NTERRUPT
R
EGISTER
(A
DDRESS
= 0
X
34) .......................................................88