- 您現(xiàn)在的位置：買賣IC網 > PDF目錄11834 > XR88C681P/40-F (Exar Corporation)IC UART CMOS DUAL 40PDIP PDF資料下載
參數(shù)資料
| 型號： | XR88C681P/40-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 38/101頁 |
| 文件大小： | 0K |
| 描述： | IC UART CMOS DUAL 40PDIP |
| 標準包裝： | 9 |
| 特點： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 1 字節(jié)，3 字節(jié) |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 帶并行端口： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 40-DIP（0.600"，15.24mm） |
| 供應商設備封裝： | 40-PDIP |
| 包裝： | 管件 |
| 其它名稱： | 1016-1640 XR88C681P/40-F-ND |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁當前第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁
XR88C681
41
Rev. 2.11
from issuing any interrupt requests to the CPU. This
“l(fā)ower priority” DUART will be prohibited from issuing
interrupts until the IEO pin of the “highest priority” DUART
has toggled “high”.
Referring, once again, to
Figure 15, the further to the right
a DUART device is, the lower its interrupt priority. The
right most DUART has the lowest-interrupt priority
because its “interrupt request” capability can be disabled
by the actions of any one of the DUARTs to the left.
Figure 16 presents a timing diagram depicting the
sequence of events that will occur during and following an
Interrupt Request from the DUART.
-INTR
-IACK
-RD
D0 - D7
FLOAT
NOT VALID
VECTOR
FLOAT
IEI
IEO
Reset IUS
Command
Figure 16. Timing Diagram Illustrating the Sequence of Events Occurring Between the
DUART and the CPU During an Interrupt Request/Acknowledge and Servicing
Additional Things to Note About Z-Mode Operation
Z-Mode operation is supported by all Zilog Peripheral
components. All Zilog Peripheral components have an
Interrupt Vector Register, Interrupt Acknowledge (IACK)
input, IEI input, and an IEO output. Therefore,
Figure 15
could have easily included some other peripheral
components, in addition to or in lieu of DUARTs.
As mentioned earlier, Z-Mode operation is recommended
if the DUART is to be interfaced to the following
processors.
D
Z-80 Microprocessor (Interrupt Mode 2)
D
8088 C
D
8086 P
D
80286 - 80586 P
Please note that it is possible to interface the 80X86
Family of microprocessors to an I-Mode DUART,
however, additional components and design complexity
would be required in order to accomplish this. The
technique/approaches to interfacing the Z-Mode DUART
to these microprocessors is presented in detail, in the
following sections.
C.6.2.1 Z-80 Microprocessor
The Z-80 P consists of an 8 bit Data Bus, a 16 bit Address
Bus and numerous control pins. The Z-80 P is a very
flexible processor which can actually interface to either a
Z-Mode or an I-Mode DUART device. This is because the
相關PDF資料 |
PDF描述 |
|---|---|
| MS27472T16B8PA | CONN RCPT 8POS WALL MT W/PINS |
| MS27473E12F8PA | CONN PLUG 8POS STRAIGHT W/PINS |
| VI-JWH-IW-F3 | CONVERTER MOD DC/DC 52V 100W |
| VI-JWH-IW-F2 | CONVERTER MOD DC/DC 52V 100W |
| VI-JWH-IW-F1 | CONVERTER MOD DC/DC 52V 100W |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XR88C681XR101524CNN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XR88C681XR101524M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XR88C681XR101524N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XR88C681XR101528CJJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XR88C681XR101528CNN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
發(fā)布緊急采購，3分鐘左右您將得到回復。