參數(shù)資料
型號(hào)： XR88C681P/40-F
廠商： Exar Corporation
文件頁數(shù)： 35/101頁
文件大?。?/td> 0K
描述： IC UART CMOS DUAL 40PDIP
標(biāo)準(zhǔn)包裝： 9
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 1 字節(jié)，3 字節(jié)
電源電壓： 4.75 V ~ 5.25 V
帶并行端口： 是
帶CMOS： 是
安裝類型： 通孔
封裝/外殼： 40-DIP（0.600"，15.24mm）
供應(yīng)商設(shè)備封裝： 40-PDIP
包裝： 管件
其它名稱： 1016-1640
XR88C681P/40-F-ND
XR88C681
39
Rev. 2.11
-R/W
-WR
E clock
-RD
-RESET
RESET
Figure 14. Glue Logic Circuitry Required to Interface the MC68HC11 C to the XR88C681 DUART
C.6.1.5 Z-80 CPU
The Z-80 CPU can be interfaced to a DUART operating in
the I-Mode, if it (the CPU) is operating in Interrupt Modes 0
or 1. However, for the sake of “process or continuity”, the
details associated with the Z-80 CPU will be presented in
Section C.6.2.1.
C.6.2 Z-Mode Interrupt Servicing
The DUART will be in the I-Mode following power up or a
hardware reset of the IC. The user must invoke the “Set
Z-Mode” command (see
Table 3), in order to command
the DUART into the Z-Mode.
In general, a CPU
interfacing to a DUART operating in the Z-Mode will
function as follows during interrupt servicing.
If the DUART requests interrupt servicing from the CPU, it
will assert the -INTR pin (e.g., toggle “l(fā)ow”). Once the
CPU has detected the interrupt request, it will issue an
IACK (Interrupt Acknowledge) signal back to the DUART.
When the CPU sends the IACK signal to the DUART it is
informing the DUART that its interrupt request is about to
be served. When the DUART has received (or detected)
the IACK signal, it will, in response, place the contents of
the Interrupt Vector Register (IVR) on the Data Bus. The
CPU will read this “interrupt vector” information; and
determine the following two things (based on the
“interrupt vector” information).
D
The source of the interrupt request (e.g., which pe-
ripheral needs service).
D
The appropriate location of the interrupt service rou-
tine.
Afterwards, program-control will be branched to the
location of the interrupt service routine.
Another characteristic of Z-Mode operation is that it
allows the user to prioritize the interrupt requests from
numerous peripheral devices, via hardware means. Let
us suppose that we have several DUART devices; and
that each of these devices have been configured to
operate in the Z-Mode. The user could prioritize the
interrupt request of each of these devices by connecting
these devices in a “daisy-chain” in a manner as presented
in
Figure 15.
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