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參數(shù)資料
| 型號(hào)： | XR68C192IP |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
| 中文描述： | 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 282K |
| 代理商： | XR68C192IP |
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XR68C92/192
18
Rev. P1.10
0 = Normal. No RTS control function.
1 = Auto RTS control function
MR2 A/B
Mode register 2. This register is accessed after any read
or write operation to MR1 A/B register is performed.
Access to MR2 A/B does not change the pointer.
MR2 A/B Bits 3-0.
Stop bit length
0000 = 0.563
0001 = 0.625
0010 = 0.668
0011 = 0.750
0100 = 0.813
0101 = 0.875
0110 = 0.938
0111 = 1.000
1000 = 1.563
1001 = 1.625
1010 = 1.668
1011 = 1.750
1100 = 1.813
1101 = 1.875
1110 = 1.938
1111 = 2.000
MR2 A/B Bit-4.
Auto CTS flow control
0 = Normal. No CTS control function
1 = Auto CTS control function.
MR2 A/B Bit-5.
Transmit RTS control.
0 = Normal. No control function
1 = Transmit RTS function enable.
MR2 A/B Bit 7-6.
Channel Mode.
0 0 = Normal
0 1 = Automatic Echo
1 0 = Local Loopback
1 1 = Remote Loopback
CLOCK SELECT REGISTER-CSR A/B
Transmit / Receive baud rates can be selected via this
register.
CSR A/B Bits 3-0.
Transmit clock select (see baud rate table)
CSR A/B Bits 7-4.
Receive clock select (see baud rate table)
MISCELLANEOUS COMMAND REGISTER CR A/B
CR A/B register is used to supply commands to A/B
channels. Multiple commands can be specified in a
single write to CR A/B as long as commands are non-
conflicting.
CR A/B Bits 1-0.
Receiver Commands
0 0 = No Action, Stays in Present Mode
0 1 = Receiver Enabled
1 0 = Receiver Disabled
1 1 = Not Used
CR A/B Bits 3-2.
Transmitter Commands
0 0 = No Action, Stays in Present Mode
0 1 = Transmitter Enabled
1 0 = Transmitter Disabled
1 1 = Not Used
CR A/B Bits 7-4.
Miscellaneous Commands.
0 0 0 0 = No Command.
0 0 0 1 = Reset MR Pointer to MR1.
0 0 1 0 = Reset Receiver. Receiver is disabled and
FIFO is flushed.
0 0 1 1 = Reset Transmitter. Transmitter is disabled
and FIFO is flushed.
0 1 0 0 = Reset Error Status. Clears channel A/B,
break, parity, and over-run error bits in the
status register.
0 1 0 1 = Reset Channels Break-Change Interrupt.
Clears channel A/B break detect change bit
in the interrupt status register (ISR Bit-2).
0 1 1 0 = Start Break. Forces the transmitter output to
go low and stay low. If transmitter is empty
the start of the break condition will be de-
layed up to two bit times. If transmitter is
active, the break begins when transmission
of the character is completed. All contents of
the FIFO has to be transmitted before break
signal takes place. Transmitter must to be
enabled for this command to be accepted.
0 1 1 1 = Stop Break. Transmit output will go high
within two bit times.
1 0 0 0 = Set -RTS output to low.
1 0 0 1 = Reset -RTS output to high.
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| XR68C192IV | DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
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| XR68C92CJ | DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR68C192IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
| XR68C192IV-F | 功能描述:UART 接口集成電路 Dual Channel UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR68C681 | 制造商:EXAR 制造商全稱:EXAR 功能描述:CMOS Dual Channel UART (DUART) |
| XR68C681CJ | 制造商:EXAR 制造商全稱:EXAR 功能描述:CMOS Dual Channel UART (DUART) |
| XR68C681CJ44 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
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