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| 型號(hào)： | XR68C192IP |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
| 中文描述： | 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁(yè)數(shù)： | 17/32頁(yè) |
| 文件大?。?/td> | 282K |
| 代理商： | XR68C192IP |
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XR68C92/192
17
Rev. P1.10
MR0 A/B
Mode register 0. This register is accessed only when
command is applied via CR A/B register. After reading
or writing to MR0 A/B register, the pointer will point to
MR1 A/B register.
MR0 A/B Bit-0.
Extended baud rate table selection.
0 = Normal baud rate tables
1 = Extend baud rate tables (1)
MR0 A/B Bit-1.
0 = Regular Operation
1 = Factory test mode
MR0 A/B Bit-2.
Extended baud rate table selection.
0 = Normal baud rate tables
1 = Extend baud rate tables (2)
MR0 A/B Bit-3.
Not used.
MR0 A/B Bits 5-4
Transmit trigger levels:
MR0
Bit-5
0
0
1
1
MR0
Bit-4
0
1
0
1
XR68C92
8 FIFO locations empty
4 FIFO locations empty
6 FIFO locations empty
1 FIFO location empty
MR0
Bit-5
0
0
1
1
MR0
Bit-4
0
1
0
1
XR68C192
16 FIFO locations empty
6 FIFO locations empty
12 FIFO locations empty
1 FIFO location empty
MR0 A/B Bit-6.
Receive trigger levels:
MR0
Bit-6
0
0
1
1
MR1
Bit-6
0
1
0
1
XR68C92
1 byte in FIFO
3 bytes in FIFO
6 bytes in FIFO
8 bytes in FIFO
MR0
Bit-6
MR1
Bit-6
XR68C192
0
0
1
1
0
1
0
1
1 byte in FIFO
6 bytes in FIFO
12 bytes in FIFO
16 bytes in FIFO
MR0 A/B Bit-7.
Receive time-out (watch dog timer).
0 = Disabled
1 = Enabled
MR1 A/B
Mode register 1. MR1 A/B are accessed after reset or
by command applied via CR A/B register. After read-
ing or writing to MR1 A/B register, the pointer will point
to MR2 A/B register.
MR1 A/B Bits 1-0.
Character Length
0 0 = 5
0 1 = 6
1 0 = 7
1 1 = 8
MR1 A/B Bit-2.
Parity Type
0 = Even Parity
1 = Odd Parity
MR1 A/B Bit 4-3.
Parity mode
00 = With parity
01 = Force parity
10 = No parity
11 = Multidrop mode
MR1 A/B Bit-5.
Data error mode
0 = Single Character mode
1 = Block (FIFO) mode
MR1 A/B Bit-6.
Receive Interrupt mode select.
0 = Single character mode (RxRdy)
1 = FIFO Full mode (FFULL)
MR1 A/B Bit-7.
Auto RTS flow control.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR68C192IV | DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
| XR68C92 | DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
| XR68C92CJ | DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
| XR68C92CP | DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
| XR68C92CV | DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR68C192IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER |
| XR68C192IV-F | 功能描述:UART 接口集成電路 Dual Channel UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR68C681 | 制造商:EXAR 制造商全稱:EXAR 功能描述:CMOS Dual Channel UART (DUART) |
| XR68C681CJ | 制造商:EXAR 制造商全稱:EXAR 功能描述:CMOS Dual Channel UART (DUART) |
| XR68C681CJ44 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
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