REV. 1.0.1 NOTE
參數(shù)資料
型號(hào): XR20V2170L40-0A-EB
廠商: Exar Corporation
文件頁(yè)數(shù): 34/49頁(yè)
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR20V2170 40QFN
標(biāo)準(zhǔn)包裝: 1
系列: *
XR20V2170
4
I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
REV. 1.0.1
NOTE: Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain. For CMOS/TTL Voltage levels, ’LOW’
indicates a voltage in the range 0V to VIL and ’HIGH" indicates a voltage in the range VIH to VCC. For RS-232
input voltage levels, ’LOW’ is any voltage < 1.5V and ’HIGH’ is any voltage > 3V. For RS-232 output voltage levels,
’LOW’ is any voltage < -5V and ’HIGH’ is any voltage > 5V.
MODEM OR SERIAL I/O INTERFACE (EIA-232/RS-232 Voltage Levels)
RXD
3
I
UART Receive Data. UART receive data input must idle LOW. This input has an
internal pull-down resistor and can be left unconnected when not used.
TXD
10
O
UART Transmit Data. The TX signal will be LOW during reset or idle (no data).
RTS
11
O
UART Request-to-Send or general purpose output. This output must be asserted
prior to using auto RTS flow control, see EFR[6], MCR[1] and IER[6].
DTR
12
I/O
UART Data-Terminal-Ready. If this pin is unused, it should be left unconnected.
DSR
1
I/O
UART Data-Set-Ready. This input has an internal pull-down resistor and can be
left unconnected when not used.
CTS
4
I
UART Clear-to-Send or general purpose input. It can be used for auto CTS flow
control, see EFR[7], MSR[4] and IER[7]. This input has an internal pull-down
resistor and can be left unconnected when not used.
CD
38
I
UART Carrier-Detect or general purpose input. This input has an internal pull-
down resistor and can be left unconnected when not used.
RI
39
I
UART Ring-Indicator or general purpose input. This input has an internal pull-
down resistor and can be left unconnected when not used.
Ancillary signals (CMOS/TTL Voltage Levels)
ACP
15
I
Autosleep for Charge Pump (active HIGH). When this pin is HIGH, the charge
pump is shut off if the V2170 is already in partial sleep mode, i.e. the crystal
oscillator is stopped.
C2+
C2-
20
21
-
Charge pump capacitors. As shown in Figure 1, a 0.1 uF capacitor should be
placed between these 2 pins.
C1+
C1-
29
30
-
Charge pump capacitors. As shown in Figure 1, a 0.1 uF capacitor should be
placed between these 2 pins.
VREF-
22
Pwr
-5.0V generated by the charge pump.
VREF+
34
Pwr
+5.0V generated by the charge pump.
GND
7, 17, 26
Pwr
Power supply common, ground.
-
PAD
Pwr
The center pad on the backside of the QFN packages is metallic and is not elec-
trically connected to anything inside the device. It must be soldered on to the
PCB and may be optionally connected to GND on the PCB. The thermal pad size
on the PCB should be the approximate size of this center pad and should be sol-
der mask defined. The solder mask opening should be at least 0.0025" inwards
from the edge of the PCB thermal pad.
N.C.
9, 19, 24, 25,
31, 32, 33
-
No Connection.
Pin Description
NAME
40-QFN
PIN #
TYPE
DESCRIPTION
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