REV. 1.0.1 I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER EFCR[2]: Transmitter Disable UART does not send serial data out on" />
參數(shù)資料
型號(hào)： XR20V2170L40-0A-EB
廠商： Exar Corporation
文件頁(yè)數(shù)： 27/49頁(yè)
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR20V2170 40QFN
標(biāo)準(zhǔn)包裝： 1
系列： *
XR20V2170
33
REV. 1.0.1
I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
EFCR[2]: Transmitter Disable
UART does not send serial data out on the TX output pin, but the TX FIFO will continue to receive data from
CPU until full. Any data in the TSR will be sent out before the trasnmitter goes into disable state.
Logic 0 = Transmitter is enabled
Logic 1 = Transmitter is disabled
EFCR[1] = Receiver Disable
UART will stop receiving data immediately once this bit is set to a Logic 1. Any data that is being received in
the TSR will be received correctly and sent to the RX FIFO.
Logic 0 = Receiver is enabled
Logic 1 = Receiver is disabled
EFCR[0]: Reserved
This bit is reserved and should remain at a logic 0.
4.20
Baud Rate Generator Registers (DLL, DLM and DLD[3:0]) - Read/Write
These registers make-up the value of the baud rate divisor. The concatenation of the contents of DLM and
DLL is a 16-bit value is then added to DLD[3:0]/16 to achieve the fractional baud rate divisor. DLD must be
enabled via EFR bit-4 before it can be accessed. SEE”P(pán)ROGRAMMABLE BAUD RATE GENERATOR WITH
DLD[5:4]: Sampling Rate Select
These bits select the data sampling rate. By default, the data sampling rate is 16X. The maximum data rate will
double if the 8X mode is selected and will quadruple if the 4X mode is selected. See Table 14 below.
TABLE 14: SAMPLING RATE SELECT
SAMPLING RATE
0
16X
0
1
8X
1
X
4X
DLD[7:6]: Reserved
4.21
Enhanced Feature Register (EFR)
Enhanced features are enabled or disabled using this register. Bit 0-3 provide single or dual consecutive
character software flow control selection (see Table 15). When the Xon1 and Xon2 and Xoff1 and Xoff2 modes
are selected, the double 8-bit words are concatenated into two sequential characters. Caution: note that
whenever changing the TX or RX flow control bits, always reset all bits back to logic 0 (disable) before
programming a new setting.
DLD[5]
DLD[4]
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XR20V2170L40-0B-EB 功能描述:UART 接口集成電路 Supports V2170 40pin QFN,SPI Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR20V2172 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
XR20V2172_08 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
XR20V2172IL64 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
XR20V2172IL64-F 功能描述:UART 接口集成電路 Transceiver RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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