REV. 1.0.0 I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS LCR[6]: Transmit Break Enable When enabled, the Break con" />
參數(shù)資料
型號(hào)： XR20M1280L40-0B-EB
廠商： Exar Corporation
文件頁(yè)數(shù)： 31/63頁(yè)
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR20M1280L40
產(chǎn)品培訓(xùn)模塊： XR21V141x Full-Speed USB UART Family
UARTs with Integrated Level Shifters
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，UART
已用 IC / 零件： XR20M1280L40
已供物品： 板
其它名稱： 1016-1627
XR20M1280
37
REV. 1.0.0
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
LCR[6]: Transmit Break Enable
When enabled, the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space’, logic 0, state). This condition remains, until disabled by setting LCR bit-6 to a logic 0.
Logic 0 = No TX break condition. (default)
Logic 1 = Forces the transmitter output (TX) to a “space”, logic 0, for alerting the remote receiver of a line
break condition.
LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL/DLM/DLD) enable.
Logic 0 = Data registers are selected. (default)
Logic 1 = Divisor latch registers are selected.
3.7
Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
MCR[0]: DTR# Output
The DTR# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
Logic 0 = Force DTR# output HIGH (default).
Logic 1 = Force DTR# output LOW.
MCR[1]: RTS# Output
The RTS# pin is a modem control output and may be used for automatic hardware flow control by enabled by
EFR bit-6. If the modem interface is not used, this output may be used as a general purpose output.
Logic 0 = Force RTS# output HIGH (default).
Logic 1 = Force RTS# output LOW. It is required to start Auto RTS Flow Control.
MCR[2]: GPIO[3:0] or Modem IO Select
This bit controls whether GPIO[3:0] behave as GPIO pins or as modem IO pins (RI#, CD#, DTR#, DSR#)
Logic 0 = GPIO[3:0] behave as GPIO pins
Logic 1 = GPIO[3:0] behave as RI#, CD#, DTR#, DSR#
In the Loopback Mode, this bit is used as the OP1# to write the state of the modem RI# interface signal.
MCR[3]: OP2# Output
OP2# is not available as an output on the M1280 but can be controlled in internal loopback mode.
Logic 0 = OP2# output set HIGH(default).
Logic 1 = OP2# output set LOW.
MCR[4]: Internal Loopback Enable
Logic 0 = Disable loopback mode (default).
Logic 1 = Enable local loopback mode, see loopback section and Figure 20.
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