參數資料
| 型號： | XR16V794IV-F |
| 廠商： | Exar Corporation |
| 文件頁數： | 28/53頁 |
| 文件大小： | 0K |
| 描述： | IC UART FIFO 64B QUAD 64LQFP |
| 標準包裝： | 160 |
| 特點： | * |
| 通道數： | 4，QUART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS485 |
| 電源電壓： | 2.25 V ~ 3.6 V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調制解調器控制功能： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
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XR16V794
34
HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL BAUD RATE
REV. 1.0.1
4.7
Modem Control Register (MCR) - Read/Write
The MCR register is used for controlling the modem interface signals or general purpose inputs/outputs.
MCR[7]: Clock Prescaler Select (requires EFR bit-4=1)
Logic 0 = Divide by one. The input clock from the crystal or external clock is fed directly to the Programmable
Baud Rate Generator without further modification, i.e., divide by one (default).
Logic 1 = Divide by four. The prescaler divides the input clock from the crystal or external clock by four and
feeds it to the Programmable Baud Rate Generator, hence, data rates become one forth.
MCR[6]: Infrared Encoder/Decoder Enable (requires EFR bit-4=1)
The state of this bit depends on the sampled logic level of pin ENIR during power up, following a hardware
reset (rising edge of RST# input). Afterward user can override this bit for desired operation.
Logic 0 = Enable the standard modem receive and transmit character interface.
Logic 1 = Enable infrared IrDA receive and transmit inputs/outputs. While in this mode, the TX/RX output/
input are routed to the infrared encoder/decoder. The data input and output levels will conform to the IrDA
infrared interface requirement. As such, while in this mode the infrared TX output will be a logic 0 during idle
data conditions. FCTR bit-4 may be selected to invert the RX input signal level going to the decoder for
infrared modules that provide rather an inverted output.
MCR[5]: Xon-Any Enable (requires EFR bit-4=1)
Logic 0 = Disable Xon-Any function (default).
Logic 1 = Enable Xon-Any function. In this mode any RX character received will enable Xon, resume data
transmission.
MCR[4]: Internal Loopback Enable
Logic 0 = Disable loopback mode (default).
Logic 1 = Enable local loopback mode, see loopback section and Figure 11.
MCR[3]: Send Char Immediate (OP2 in Local Loopback Mode)
This bit is used to transmit a character immediately irrespective of the bytes currently in the transmit FIFO. The
data byte must be loaded into the transmit holding register (THR) immediately following the write to this bit (to
set it to a ’1’). In other words, no other register must be accessed between setting this bit and writing to the
THR. The loaded byte will be transmitted ahead of all the bytes in the TX FIFO, immediately after the character
currently being shifted out of the transmit shift register is sent out. The existing line parameters (parity, stop
bits) will be used when composing the character. This bit is self clearing, therefore, must be set before sending
a custom characer each time. Please note that the Transmitter must be enabled for this function (MSR[3] = 0).
Also, if software flow control is enabled, the software flow control characters (Xon, Xoff) have higher priority
and will get shifted out before the custom byte is transmitted.
Logic 0 = Send Char Immediate disabled (default).
Logic 1 = Send Char Immediate enabled.
In Local Loopback Mode (MCR[4] = 1), this bit acts as the legacy OP2 output and controls the CD bit in the
MSR register as shown in Figure 11. Please make sure that this bit is a ’0’ when exiting the Local Loopback
Mode.
MCR[2]: DTR# or RTS# for Auto Flow Control (OP1 in Local Loopback Mode)
DTR# or RTS# auto hardware flow control select. This bit is in effect only when auto RTS/DTR is enabled by
EFR bit-6. DTR# selection is associated with DSR# and RTS# is with CTS#.
Logic 0 = Uses RTS# and CTS# pins for auto hardware flow control.
Logic 1 = Uses DTR# and DSR# pins for auto hardware flow control.
In Local Loopback mode (MCR[4] = 1), this bit acts as the legacy OP1 output and controls the RI bit in the MSR
register, as shown in Figure 11.
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| XR16V798 | 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE 2.25V TO 3.6V OCTAL UART WITH FRACTIONAL |
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| XR16V798IQ-0A-EVB | 功能描述:UART 接口集成電路 Supports V798 100 ld QFP,ISA Interface RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16V798IQ-0B-EVB | 功能描述:UART 接口集成電路 Supports V798 100 ld QFP,PCI Interface RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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