參數(shù)資料
型號(hào): XR16V794IV-F
廠商: Exar Corporation
文件頁數(shù): 11/53頁
文件大小: 0K
描述: IC UART FIFO 64B QUAD 64LQFP
標(biāo)準(zhǔn)包裝: 160
特點(diǎn): *
通道數(shù): 4,QUART
FIFO's: 64 字節(jié)
規(guī)程: RS485
電源電壓: 2.25 V ~ 3.6 V
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
XR16V794
19
REV. 1.0.1
HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL BAUD RATE
3.1
DEVICE CONFIGURATION REGISTER SET
The device configuration registers are directly accessible from the bus. This provides easy programming of
general operating parameters to the 794 UART and for monitoring the status of various functions. The device
configuration registers are mapped onto address 0x80-8F as shown on the register map in Table 8 and
. These registers provide global controls and status of all 4 channel UARTs that include interrupt
status, 16-bit general purpose timer control and status, 8X or 16X sampling clock, sleep mode control, soft-
reset control, simultaneous UART initialization, and device identification and revision.
FIGURE 12. THE XR16V794 REGISTERS
TABLE 7: XR16V794 REGISTER SETS
ADDRESS [A7:A0]
UART CHANNEL SPACE
REFERENCE
COMMENT
0x00 - 0x0F
UART channel 0 Registers
First 8 registers are 16550 compatible
0x10 - 0x1F
UART channel 1 Registers
0x20 - 0x2F
UART channel 2 Registers
0x30 - 0x3F
UART channel 3 Registers
0x40 - 0x7F
None
Reserved
0x80 - 0x8F
Device Configuration Registers
(
Interrupt registers and global controls
INT0, INT1, INT2,
INT3, TIMER,
SLEEP, RESET
8-bit Data
Bus
Interface
Channel 0
Channel 1
Channel 2
Channel 3
Device Configuration Registers
4 channel Interrupts,
16-bit Timer/Counter,
Sleep, Reset, DVID, DREV
UART[3:0] Configuration Registers
16550 Compatible and
Exar Enhanced Registers
784REGS
0x10-1F
0x00-0F
0x20-2F
0x30-3F
0x40-7F
(reserved)
0x80-8F
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