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    參數(shù)資料
    型號: XR16C864IQ-F
    廠商: Exar Corporation
    文件頁數(shù): 14/51頁
    文件大?。?/td> 0K
    描述: IC UART FIFO 128B QUAD 100QFP
    標(biāo)準(zhǔn)包裝: 66
    特點: *
    通道數(shù): 4,QUART
    FIFO's: 128 字節(jié)
    規(guī)程: RS232,RS485
    電源電壓: 2.97 V ~ 5.5 V
    帶自動流量控制功能:
    帶IrDA 編碼器/解碼器:
    帶故障啟動位檢測功能:
    帶調(diào)制解調(diào)器控制功能:
    帶CMOS:
    安裝類型: 表面貼裝
    封裝/外殼: 100-BQFP
    供應(yīng)商設(shè)備封裝: 100-QFP(14x20)
    包裝: 托盤
    其它名稱: 1016-1277
    XR16C864
    21
    REV. 2.2.0
    2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
    2.21
    Sleep Mode with Auto Wake-Up
    The 864 supports low voltage system designs, hence, a sleep mode is included to reduce its power
    consumption when the chip is not actively used.
    All of these conditions must be satisfied for the 864 to enter sleep mode:
    s
    no interrupts pending for all four channels of the 864 (ISR bit-0 = 1)
    s
    sleep mode of all four channels are enabled (IER bit-4 = 1)
    s
    modem inputs are not toggling (MSR bits 0-3 = 0)
    s
    RX input pins are idling at a logic 1
    The 864 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for no
    clock output as an indication that the device has entered the sleep mode.
    The 864 resumes normal operation by any of the following:
    s
    a receive data start bit transition (logic 1 to 0)
    s
    a data byte is loaded to the transmitter, THR or FIFO
    s
    a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
    If the 864 is awakened by any one of the above conditions, it will return to the sleep mode automatically after
    all interrupting conditions have been serviced and cleared. If the 864 is awakened by the modem inputs, a read
    to the MSR is required to reset the modem inputs. In any case, the sleep mode will not be entered while an
    interrupt is pending in any channel. The 864 will stay in the sleep mode of operation until it is disabled by
    setting IER bit-4 to a logic 0.
    If the address lines, data bus lines, IOW#, IOR#, CSA#, CSB#, CSC#, CSD# and modem input lines remain
    steady when the 864 is in sleep mode, the maximum current will be in the microamp range as specified in the
    DC Electrical Characteristics on page 42. If the input lines are floating or are toggling while the 864 is in sleep
    mode, the current can be up to 100 times more. If any of those signals are toggling or floating, then an external
    buffer would be required to keep the address, data and control lines steady to achieve the low current.
    A word of caution: owing to the starting up delay of the crystal oscillator after waking up from sleep mode, the
    first few receive characters may be lost. Also, make sure the RX input is idling at logic 1 or “marking” condition
    during sleep mode. This may not occur when the external interface transceivers (RS-232, RS-485 or another
    type) are also put to sleep mode and cannot maintain the “marking” condition. To avoid this, the system design
    engineer can use a 47k ohm pull-up resistor on the RX A-D inputs.
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