參數(shù)資料
型號: XQ2V6000
廠商: Xilinx, Inc.
英文描述: QPro Virtex-II 1.5V Military QML Platform FPGAs
中文描述: QPro的Virtex - II 1.5V的軍事QML第平臺FPGA
文件頁數(shù): 37/128頁
文件大?。?/td> 2738K
代理商: XQ2V6000
QPro Virtex-II 1.5V Military QML Platform FPGAs
DS122 (v1.1) January 7, 2004
Product Specification
www.xilinx.com
1-800-255-7778
37
R
Phase Shifting
The DCM provides additional control over clock skew
through either coarse- or fine-grained phase shifting. The
CLK0, CLK90, CLK180, and CLK270 outputs are each
phase shifted by of the input clock period relative to each
other, providing coarse phase control. Note that CLK90 and
CLK270 are not available in high-frequency mode.
Fine-phase adjustment affects all nine DCM output clocks.
When activated, the phase shift between the rising edges of
CLKIN and CLKFB is a specified fraction of the input clock
period.
In variable mode, the
PHASE_SHIFT
value can also be
dynamically incremented or decremented as determined by
PSINCDEC synchronously to PSCLK, when the PSEN
input is active.
Figure 47
illustrates the effects of fine-phase
shifting. For more information on DCM features, see the
Virtex-II User Guide
(
UG002
).
Table 26
lists fine-phase shifting control pins, when used in
variable mode.
Two separate components of the phase shift range must be
understood:
PHASE_SHIFT
attribute range
FINE_SHIFT_RANGE
DCM timing parameter range
The
PHASE_SHIFT
attribute is the numerator in the following
equation:
Phase Shift (ns) = (
PHASE_SHIFT
/256) * PERIOD
CLKIN
The full range of this attribute is always -255 to +255, but its
practical range varies with CLKIN frequency, as constrained
by the
FINE_SHIFT_RANGE
component, which represents
the total delay achievable by the phase shift delay line. Total
delay is a function of the number of delay taps used in the
circuit. Across process, voltage, and temperature, this abso-
lute range is guaranteed to be as specified under
DCM Tim-
ing Parameters
.
Absolute range (fixed mode) = ±
FINE_SHIFT_RANGE
Absolute range (variable mode) = ±
FINE_SHIFT_RANGE
/2
The reason for the difference between fixed and variable
modes is as follows. For variable mode to allow symmetric,
dynamic sweeps from -255/256 to +255/256, the DCM sets
the "zero phase skew" point as the middle of the delay line,
thus dividing the total delay line range in half. In fixed mode,
since the
PHASE_SHIFT
value never changes after configu-
ration, the entire delay line is available for insertion into
either the CLKIN or CLKFB path (to create either positive or
negative skew).
Taking both of these components into consideration, the fol-
lowing are some usage examples:
If PERIOD
CLKIN
= 2 *
FINE_SHIFT_RANGE
, then
PHASE_SHIFT in
fixed mode is limited to
±
128, and in
variable mode it is limited to
±
64.
If PERIOD
CLKIN
=
FINE_SHIFT_RANGE
, then
PHASE_SHIFT in
fixed mode is limited to
±
255, and in
variable mode it is limited to
±
128.
If PERIOD
CLKIN
0.5 *
FINE_SHIFT_RANGE
, then
PHASE_SHIFT
is limited to
±
255 in either mode.
Table 26:
Fine-Phase Shifting Control Pins
Control Pin
Direction
Function
PSINCDEC
in
Increment or decrement
PSEN
in
Enable ± phase shift
PSCLK
in
Clock for phase shift
PSDONE
out
Active when completed
Figure 47:
Fine-Phase Shifting Effects
CLKOUT_PHASE_SHIFT
= FIXED
CLKOUT_PHASE_SHIFT
= VARIABLE
CLKOUT_PHASE_SHIFT
= NONE
CLKIN
CLKIN
CLKIN
CLKFB
(PS/256) x PERIODCLKIN
(PS negative)
(PS/256) x PERIODCLKIN
(PS positive)
(PS/256) x PERIODCLKIN
(PS negative)
(PS/256) x PERIODCLKIN
(PS positive)
DS031_48_101201
CLKFB
CLKFB
ds122_1_1.fm Page 37 Wednesday, January 7, 2004 9:15 PM
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