參數(shù)資料
型號： XE8806AMI026TLF
廠商： Semtech
文件頁數(shù)： 94/143頁
文件大小： 0K
描述： IC MCU LOW PWR MTP FLASH 32-TQFP
標(biāo)準(zhǔn)包裝： 1
系列： XE880x
應(yīng)用： 感測機(jī)
核心處理器： Coolrisc816?
程序存儲器類型： 閃存（22 kB）
控制器系列： XE8000
RAM 容量： 512 x 8
接口： UART，USRT
輸入/輸出數(shù)： 24
電源電壓： 2.4 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 32-TQFP
包裝： 剪切帶 (CT)
供應(yīng)商設(shè)備封裝： 32-TQFP（7x7）
配用： XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
其它名稱： XE8806AMI026CT
Semtech 2006
www.semtech.com
8-4
XE8806A/XE8807A
pos.
RegIrqEnMid
rw
reset
function
7
RegIrqEnMid[7]
rw
0
1= enable interrupt #15
6
RegIrqEnMid[6]
rw
0
1= enable interrupt #14
5
RegIrqEnMid[5]
rw
0
1= enable interrupt #13
4
RegIrqEnMid[4]
rw
0
1= enable interrupt #12
3
RegIrqEnMid[3]
rw
0
1= enable interrupt #11
2
RegIrqEnMid[2]
rw
0
1= enable interrupt #10
1
RegIrqEnMid[1]
rw
0
1= enable interrupt #9
0
RegIrqEnMid[0]
rw
0
1= enable interrupt #8
Table 8-6: RegIrqEnMid
pos.
RegIrqEnLow
rw
reset
function
7
RegIrqEnLow[7]
rw
0
1= enable interrupt #7
6
RegIrqEnLow[6]
rw
0
1= enable interrupt #6
5
RegIrqEnLow[5]
rw
0
1= enable interrupt #5
4
RegIrqEnLow[4]
rw
0
1= enable interrupt #4
3
RegIrqEnLow[3]
rw
0
1= enable interrupt #3
2
RegIrqEnLow[2]
rw
0
1= enable interrupt #2
1
RegIrqEnLow[1]
rw
0
1= enable interrupt #1
0
RegIrqEnLow[0]
rw
0
1= enable interrupt #0
Table 8-7: RegIrqEnLow
pos.
RegIrqPriority
rw
reset
function
7-0
RegIrqPriority
r
11111111
code of highest priority set
Table 8-8: RegIrqPriority
pos.
RegIrqIrq
rw
reset
function
7-3
-
r
00000
unused
2
IrqHig
r
0
one or more high priority interrupts is set
1
IrqMid
r
0
one or more mid priority interrupts is set
0
IrqLow
r
0
one or more low priority interrupts is set
Table 8-9: RegIrqIrq
8.4
Detailed description
The CoolRISC core has 3 different interrupt levels IN0, IN1 and IN2 (Figure 8-1). When these interrupts are
triggered, the program counter (PC) is loaded with a fixed address. In case more than one interrupt occurs
simultaneously, the execution order is IN0, IN1, IN2.
The masking, setting and clearing of these interrupts can be done in the stat register (see chapter describing the
CPU).
The interrupt handler bundles a certain number of interrupt sources and routes them to one of these three
interrupts and provides the possibility to enable/disable each of them individually. The definition of the interrupt
sources is given in the memory mapping chapter.
RegIrqHig, RegIrqMid, and RegIrqLow are 8-bit registers containing flags for the interrupt sources. Those flags are
set when the interrupt is enabled (i.e. if the corresponding bit in the registers RegIrqEnHig, RegIrqEnMid or
RegIrqEnLow is set) and a rising edge is detected on the corresponding interrupt source.
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XE8807AMI026TLF 功能描述:IC MCU LOW PWR MTP FLASH 32-TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:XE880x 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382
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