參數(shù)資料
型號: XE8806AMI026TLF
廠商: Semtech
文件頁數(shù): 134/143頁
文件大?。?/td> 0K
描述: IC MCU LOW PWR MTP FLASH 32-TQFP
標準包裝: 1
系列: XE880x
應用: 感測機
核心處理器: Coolrisc816?
程序存儲器類型: 閃存(22 kB)
控制器系列: XE8000
RAM 容量: 512 x 8
接口: UART,USRT
輸入/輸出數(shù): 24
電源電壓: 2.4 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-TQFP
包裝: 剪切帶 (CT)
供應商設備封裝: 32-TQFP(7x7)
配用: XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
其它名稱: XE8806AMI026CT
Semtech 2006
www.semtech.com
14-10
XE8806A/XE8807A
Figure 14-6. Pattern start detection in NRZ-Mark for RfifRxSPat[7:0]=10011111
The start pattern can not be less than 8 bits since no bits can be set as “don’t care”.
14.8.3
PCM decoding
The interface can receive coded or uncoded messages. The coding/decoding function is enabled/disabled using
the bit RfifEnCod (1 = enable) in the register RegRfifCmd2.
The PCM code type is selected using the RfifPCM[2:0] control word in the register RegRfifCmd2. The selection
control bits are given in Table 14-12.
NRZ
Bi-Phase
PCM Codes
Level
Mark
Space
Level
Mark
Space
Miller
RfifPCM[2:0]
000
001
010
011
100
101
11X
Table 14-14: PCM code selection
If the decoder detects invalid code sequences and the selected start detection mode is not the “protocol “ mode
(RfifEnStart[1:0]
≠ 01, see Table 14-13), the decoder output generates an equivalent number of random data bits.
If the decoder is disabled (RfifEnCod = 0), the meaning of the RfifPCM[2:0] changes: if the NRZ coding is
selected, the input bit stream is sampled at the selected bit rate. If the Manchester or Miller coding is selected, the
input stream is sampled at twice the data rate. This allows the decoding of the bit stream by software.
14.8.4
Reception FIFO
The decoder output data are serially shifted in a shift register (see Figure 14-1). The bit RfifRxBusy = 1 in
RegRfifRxSta indicates that new data are shifted in.
When 8 new bits are present in the shift register, the byte is loaded in the FIFO. The FIFO has a depth of 4. The bit
RfifRxReady = 1 in RegRfifRxSta indicates that at least 1 byte is present in the FIFO. The software can read the
data in the FIFO in RegRfifRx. When the bit RfifRxFifoFull is 1, the FIFO is full and data should be read by the
software before the next byte is received. If not, data will be lost and the bit RfifRxFifoOverrun is set to 1. Writing
a 1 to this bit will clear the bit and the FIFO contents. The detection of a new start sequence will also clear the
RfifRxFifoOverrun bit and the FIFO contents.
The first bit that is received can be found in the position RfifRx[0], the second bit in the position RfifRx[1] and so
on.
NRZ - Mark
1
10
00
01
1
0
1
start sequence
first bit in FIFO
RfifRxSPat=10011111
decoded data
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XE8807AMI026TLF 功能描述:IC MCU LOW PWR MTP FLASH 32-TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應用 系列:XE880x 產品變化通告:Product Discontinuation 26/Aug/2009 標準包裝:250 系列:- 應用:網絡處理器 核心處理器:4Kc 程序存儲器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網,UART,USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應商設備封裝:PG-LQFP-208 其它名稱:SP000314382