參數(shù)資料
型號(hào): XC3S700AN-4FG484I
廠商: Xilinx Inc
文件頁(yè)數(shù): 69/123頁(yè)
文件大?。?/td> 0K
描述: IC FPGA SPARTAN 3AN 484FBGA
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-3AN
LAB/CLB數(shù): 1472
邏輯元件/單元數(shù): 13248
RAM 位總計(jì): 368640
輸入/輸出數(shù): 372
門數(shù): 700000
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FBGA
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)當(dāng)前第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)
Spartan-3AN FPGA Family: Introduction and Ordering Information
DS557 (v4.1) April 1, 2011
Product Specification
5
Sector-based data protection and security features
Sector Protect: Write- and erase-protect a sector
(changeable)
Sector Lockdown: Sector data is unchangeable
(permanent)
128-byte Security Register
Separate from FPGA’s unique Device DNA
identifier
64-byte factory-programmed identifier unique to
the in-system Flash memory
64-byte one-time programmable,
user-programmable field
100,000 Program/Erase cycles
20-year data retention
Comprehensive programming support
In-system prototype programming via JTAG using
Xilinx Platform Cable USB and iMPACT software
Product programming support using BPM
Microsystems programmers with appropriate
programming adapter
Design examples demonstrating in-system
programming from a Spartan-3AN FPGA
application
I/O Capabilities
The Spartan-3AN FPGA SelectIO interface supports many
popular single-ended and differential standards. Table 4
shows the number of user I/Os as well as the number of
differential I/O pairs available for each device/package
combination. Some of the user I/Os are unidirectional,
input-only pins as indicated in Table 4.
Spartan-3AN FPGAs support the following single-ended
standards:
3.3V low-voltage TTL (LVTTL)
Low-voltage CMOS (LVCMOS) at 3.3V, 2.5V, 1.8V,
1.5V, or 1.2V
3.3V PCI at 33 MHz or 66 MHz
HSTL I, II, and III at 1.5V and 1.8V, commonly used in
memory applications
SSTL I and II at 1.8V, 2.5V, and 3.3V, commonly used
for memory applications
Spartan-3AN FPGAs support the following differential
standards:
LVDS, mini-LVDS, RSDS, and PPDS I/O at 2.5V or
3.3V
Bus LVDS I/O at 2.5V
TMDS I/O at 3.3V
Differential HSTL and SSTL I/O
LVPECL inputs at 2.5V or 3.3V
Table 4: Available User I/Os and Differential (Diff) I/O Pairs
Package(1)
TQ144
TQG144
FT256
FTG256
FG400
FGG400
FG484
FGG484
FG676
FGG676
Body Size (mm)
20 x 20(2)
17 x17
21x 21
23x23
27 x 27
Device(3)
User
Diff
User
Diff
User
Diff
User
Diff
User
Diff
XC3S50AN
108(4)
(7)
50
(24)
144
(32)
64
(32)
XC3S200AN
195
(35)
90
(50)
XC3S400AN
195
(35)
90
(50)
311
(63)
142
(78)
XC3S700AN
372
(84)
165
(93)
XC3S1400AN
375
(87)
165
(93)
502
(94)
227
(131)
Notes:
1.
See Pb and Pb-Free Packaging, page 7 for details on Pb and Pb-free packaging options.
2.
The footprint for the TQ(G)144 (22 mm x 22 mm) package is larger than the package body.
3.
Each Spartan-3AN FPGA has a pin-compatible Spartan-3A FPGA equivalent, although Spartan-3A FPGAs do not have internal SPI flash
and offer more part/package combinations.
4.
The number shown in bold indicates the maximum number of I/O and input-only pins. The number shown in (italics) indicates the number
of input-only pins. The differential (Diff) input-only pin count includes both differential pairs on input-only pins and differential pairs on I/O pins
within I/O banks that are restricted to differential inputs.
相關(guān)PDF資料
PDF描述
84981-4 CONN FFC 4POS 1MM RT ANG SMD
XC5VTX240T-2FFG1759CES IC FPGA VIRTEX5TX 240K 1759FBGA
ABB70DHBN CONN EDGECARD 140PS R/A .050 SLD
XC5VTX240T-2FF1759CES IC FPGA VIRTEX5TX 240K 1759FBGA
ABB70DHBD CONN EDGECARD 140PS R/A .050 SLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC3S700AN-4FGG484C 功能描述:IC SPARTAN-3AN FPGA 700K 484FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Spartan®-3AN 標(biāo)準(zhǔn)包裝:60 系列:XP LAB/CLB數(shù):- 邏輯元件/單元數(shù):10000 RAM 位總計(jì):221184 輸入/輸出數(shù):244 門數(shù):- 電源電壓:1.71 V ~ 3.465 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:388-BBGA 供應(yīng)商設(shè)備封裝:388-FPBGA(23x23) 其它名稱:220-1241
XC3S700AN-4FGG484CES 制造商:Xilinx 功能描述:
XC3S700AN-4FGG484I 功能描述:IC FPGA SPARTAN -3AN700K 484FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Spartan®-3AN 標(biāo)準(zhǔn)包裝:24 系列:ECP2 LAB/CLB數(shù):1500 邏輯元件/單元數(shù):12000 RAM 位總計(jì):226304 輸入/輸出數(shù):131 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP(28x28)
XC3S700AN-5FG484C 制造商:Xilinx 功能描述:FPGA SPARTAN-3AN FAMILY 700K GATES 13248 CELLS 770MHZ 90NM T - Trays 制造商:Xilinx 功能描述:IC FPGA 372 I/O 484FBGA
XC3S700AN-5FGG484C 功能描述:IC FPGA SPARTAN-3A 700K 484-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Spartan®-3AN 標(biāo)準(zhǔn)包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計(jì):2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA(27x27)