- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4176 > XC3042A-7PQ100C (Xilinx Inc)IC LOGIC CL ARRAY 4200GAT 100PQF PDF資料下載
參數(shù)資料
| 型號： | XC3042A-7PQ100C |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 33/76頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LOGIC CL ARRAY 4200GAT 100PQF |
| 產(chǎn)品變化通告： | Product Discontinuation 27/Apr/2010 |
| 標準包裝： | 1 |
| 系列： | XC3000A/L |
| LAB/CLB數(shù)： | 144 |
| RAM 位總計： | 30784 |
| 輸入/輸出數(shù)： | 82 |
| 門數(shù)： | 3000 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 100-BQFP |
| 供應商設備封裝： | 100-QFP（14x20） |
| 其它名稱： | 122-1026 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁當前第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁
R
November 9, 1998 (Version 3.1)
7-41
XC3000 Series Field Programmable Gate Arrays
7
XC3000A Switching Characteristics
Xilinx maintains test specifications for each product as controlled documents. To insure the use of the most recently released
device performance parameters, please request a copy of the current test-specification revision.
XC3000A Operating Conditions
Note:
At junction temperatures above those listed as Operating Conditions, all delay parameters increase by 0.3% per
°C.
XC3000A DC Characteristics Over Operating Conditions
Notes: 1. With no output current loads, no active input or Longline pull-up resistors, all package pins at VCC or GND, and the FPGA
device configured with a tie option.
2. Total continuous output sink current may not exceed 100 mA per ground pin. Total continuous output source may not exceed
100 mA per VCC pin. The number of ground pins varies from the XC3020A to the XC3090A.
3. Not tested. Allow an undriven pin to float High. For any other purposes use an external pull-up.
Symbol
Description
Min
Max
Units
VCC
Supply voltage relative to GND Commercial 0
°C to +85°C junction
4.75
5.25
V
Supply voltage relative to GND Industrial -40
°C to +100°C junction
4.5
5.5
V
VIHT
High-level input voltage — TTL configuration
2.0
VCC
V
VILT
Low-level input voltage — TTL configuration
0
0.8
V
VIHC
High-level input voltage — CMOS configuration
70%
100%
VCC
VILC
Low-level input voltage — CMOS configuration
0
20%
VCC
TIN
Input signal transition time
250
ns
Symbol
Description
Min
Max
Units
VOH
High-level output voltage (@ IOH = –4.0 mA, VCC min)
Commercial
3.86
V
VOL
Low-level output voltage (@ IOL = 4.0 mA, VCC min)
0.40
V
VOH
High-level output voltage (@ IOH = –4.0 mA, VCC min)
Industrial
3.76
V
VOL
Low-level output voltage (@ IOL = 4.0 mA, VCC min)
0.40
V
VCCPD
Power-down supply voltage (PWRDWN must be Low)
2.30
V
ICCPD
Power-down supply current
(VCC(MAX) @ TMAX)
3020A
3030A
3042A
3064A
3090A
100
160
240
340
500
A
ICCO
Quiescent FPGA supply current in addition to ICCPD
Chip thresholds programmed as CMOS levels
Chip thresholds programmed as TTL levels
500
10
A
IIL
Input Leakage Current
–10
+10
A
CIN
Input capacitance, all packages except PGA175
(sample tested)
All Pins except XTL1 and XTL2
XTL1 and XTL2
10
15
pF
Input capacitance, PGA 175
(sample tested)
All Pins except XTL1 and XTL2
XTL1 and XTL2
16
20
pF
IRIN
Pad pull-up (when selected) @ VIN = 0 V
3
0.02
0.17
mA
IRLL
Horizontal Longline pull-up (when selected) @ logic Low
3.4
mA
Product Obsolete or Under Obsolescence
相關PDF資料 |
PDF描述 |
|---|---|
| ABC65DRES-S734 | CONN EDGECARD 130PS .100 EYELET |
| A14V40A-PQG160C | IC FPGA 4K GATES 3.3V 160-PQFP |
| EMC18DTEF | CONN EDGECARD 36POS .100 EYELET |
| A1425A-1PQ160I | IC FPGA 2500 GATES 160-PQFP |
| A1440A-PQG160I | IC FPGA 4K GATES 160-PQFP |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC3042A-7PQ100C0167 | 制造商:Xilinx 功能描述: |
| XC3042A-7PQ100C0262 | 制造商:Xilinx 功能描述: |
| XC3042A-7PQ100C0341 | 制造商:Xilinx 功能描述: |
| XC3042A-7PQ100I | 制造商: 功能描述: 制造商:undefined 功能描述: |
| XC3042A-7PQG100I | 制造商:Xilinx 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。