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參數(shù)資料
| 型號： | XC167CS-32F |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 16-Bit Single-Chip Microcontroller with C166SV2 Core |
| 中文描述： | 16位單片機與C166SV2核心 |
| 文件頁數(shù)： | 68/90頁 |
| 文件大小： | 888K |
| 代理商： | XC167CS-32F |
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XC167-32
Derivatives
Electrical Parameters
Data Sheet
66
V1.0, 2005-06
4.3
Analog/Digital Converter Parameters
Table 14
A/D Converter Characteristics
(Operating Conditions apply)
Parameter
Symbol
Limit Values
Min.
SR 4.5
Unit Test
Condition
Max.
V
DDP
+ 0.1
V
SS
+ 0.1
V
AREF
20
Analog reference supply
V
AREF
V
1)
1) TUE is tested at
V
AREF
=
V
DDP
+ 0.1 V,
V
AGND
= 0 V. It is verified by design for all other voltages within the
defined voltage range.
If the analog reference supply voltage drops below 4.5 V (i.e.
V
AREF
≥
4.0 V) or exceeds the power supply
voltage by up to 0.2 V (i.e.
V
AREF
=
V
DDP
+ 0.2 V) the maximum TUE is increased to
±
3 LSB. This range is not
subject to production test.
The specified TUE is guaranteed only, if the absolute sum of input overload currents on Port 5 pins (see
I
OV
specification) does not exceed 10 mA, and if
V
AREF
and
V
AGND
remain stable during the respective period of
time. During the reset calibration sequence the maximum TUE may be
±
4 LSB.
2)
V
AIN
may exceed
V
AGND
or
V
AREF
up to the absolute maximum ratings. However, the conversion result in these
cases will be X000
H
or X3FF
H
, respectively.
Analog reference ground
Analog input voltage range
V
AIN
Basic clock frequency
Conversion time for 10-bit
result
4)
V
AGND
SR
V
SS
- 0.1
SR
V
AGND
0.5
CC 52
×
t
BC
+
t
S
+ 6
×
t
SYS
–
CC 40
×
t
BC
+
t
S
+ 6
×
t
SYS
–
CC 44
×
t
BC
+
t
S
+ 6
×
t
SYS
–
CC 32
×
t
BC
+
t
S
+ 6
×
t
SYS
–
CC 484
CC –
CC –
V
V
MHz
–
2)
f
BC
t
C10P
t
C10
t
C8P
t
C8
3)
Post-calibr. on
Post-calibr. off
Post-calibr. on
Post-calibr. off
Conversion time for 8-bit
result
4)
Calibration time after reset
t
CAL
Total unadjusted error
Total capacitance
of an analog input
Switched capacitance
of an analog input
Resistance of
the analog input path
Total capacitance
of the reference input
Switched capacitance
of the reference input
Resistance of
the reference input path
11,696
±
2
15
t
BC
LSB
pF
5)
TUE
C
AINT
1)
6)
C
AINS
CC –
10
pF
6)
R
AIN
CC –
2
k
6)
C
AREFT
CC –
20
pF
6)
C
AREFS
CC –
15
pF
6)
R
AREF
CC –
1
k
6)
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