參數(shù)資料
型號(hào): XC161CJ-16F
廠商: INFINEON TECHNOLOGIES AG
英文描述: 16-Bit Single-Chip Microcontroller with C166SV2 Core
中文描述: 16位單片機(jī)與C166SV2核心
文件頁(yè)數(shù): 23/87頁(yè)
文件大?。?/td> 807K
代理商: XC161CJ-16F
XC161-16
Derivatives
Functional Description
Data Sheet
21
V2.3, 2006-03
so-called General Purpose Registers (GPRs).
The upper 256 bytes of the DPRAM are directly bitaddressable. When used by a GPR,
any location in the DPRAM is bitaddressable.
1024 bytes (2
×
512 bytes)
of the address space are reserved for the Special Function
Register areas (SFR space and ESFR space). SFRs are wordwide registers which are
used for controlling and monitoring functions of the different on-chip units. Unused SFR
addresses are reserved for future members of the XC166 Family. Therefore, they should
either not be accessed, or written with zeros, to ensure upward compatibility.
In order to meet the needs of designs where more memory is required than is provided
on chip, up to 12 Mbytes (approximately, see
Table 3
) of external RAM and/or ROM can
be connected to the microcontroller. The External Bus Interface also provides access to
external peripherals.
Table 3
XC161 Memory Map
1)
1) Accesses to the shaded areas generate external bus accesses.
2) The areas marked with “<” are slightly smaller than indicated, see column “Notes”.
3) Not defined register locations return a trap code.
4) Several pipeline optimizations are not active within the external IO area. This is necessary to control external
peripherals properly.
Address Area
Flash register space
Reserved (Access trap) F8’0000
H
Start Loc.
FF’F000
H
End Loc.
FF’FFFF
H
FF’EFFF
H
Area Size
2)
4 Kbytes
< 0.5 Mbytes
Notes
3)
Minus Flash
registers
Minus PSRAM
Maximum
Minus Flash
Reserved for PSRAM
Program SRAM
Reserved for program
memory
Program Flash
Reserved
External memory area
E0’0800
H
E0’0000
H
C2’0000
H
F7’FFFF
H
E0’07FF
H
DF’FFFF
H
< 1.5 Mbytes
2 Kbytes
< 2 Mbytes
C0’0000
H
BF’0000
H
40’0000
H
C1’FFFF
H
BF’FFFF
H
BE’FFFF
H
128 Kbytes
64 Kbytes
< 8 Mbytes
Minus reserved
segment
Minus TwinCAN
Minus segment 0
Partly used
External IO area
4)
TwinCAN registers
External memory area
Data RAMs and SFRs
External memory area
20’0800
H
20’0000
H
01’0000
H
00’8000
H
00’0000
H
3F’FFFF
H
20’07FF
H
1F’FFFF
H
00’FFFF
H
00’7FFF
H
< 2 Mbytes
2 Kbytes
< 2 Mbytes
32 Kbytes
32 Kbytes
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