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參數(shù)資料
| 型號(hào)： | X80010 |
| 廠商： | Intersil Corporation |
| 英文描述： | Penta-Power Sequence Controller with Hot swap and System Management |
| 中文描述： | 季戊四醇功率序列熱插拔控制器和系統(tǒng)管理 |
| 文件頁(yè)數(shù)： | 22/25頁(yè) |
| 文件大小： | 548K |
| 代理商： | X80010 |
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22
FN8149.0
January 13, 2005
1. Power Up of DC/DC Supplies Via Relay Sequencing
Using Power Good and Voltage Monitors (see Figure 43
and Figure 44).
Several DC/DC power supplies and their respective
power up start times can be controlled using the X80010
such that each of the DC/DC power supplies will start in
a relay sequencing fashion. The 1st DC/DC supply will
power up when PWRGD is LOW after a 100ms delay.
Subsequent DC/DC supplies will power up after the prior
supply has reached its operating voltage. One way to do
this is by using an external CPU Supervisor (for example
the Intersil X40430) to monitor the DC/DC output. When
the DC/DC voltage is good, the supervisor output signals
the X80010 EN1 input to sequence the next supply. An
opto-coupler is recommended in this connection for
isolation. This configuration ensures that each
subsequent DC/DC supply will power up after the
preceding DC/DC supply voltage output is valid.
EN1
t
DELAY1
V1GDO
Power Supply
#1 turns ON
Power Supply
#1 OUTPUT
V2GDO
100ms
V3GDO
t
DELAY2
t
DELAY3
Power Supply
#2 OUTPUT
Power Supply
#3 OUTPUT
t
DELAY4
V4GDO
(from PWRGD)
(3.3V)
(2.5V)
(1.8V)
RESET
Main FET
turns ON
EN2
EN3
Power Supply
#4 OUTPUT
(1.2V)
EN4
Power Supply
#2 turns ON
100ms
Power Supply
#3 turns ON
100ms
Power Supply
#4 turns ON
100ms
100ms
t
SPOR
All ViGOOD=LOW
(from PWRGD)
(from PWRGD)
(from PWRGD)
FIGURE 42. PARALLEL SEQUENCING OF DC/DC SUPPLIES.
(TIMING)
X80010, X80011, X80012, X80013
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