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參數(shù)資料
| 型號(hào)： | X80010 |
| 廠商： | Intersil Corporation |
| 英文描述： | Penta-Power Sequence Controller with Hot swap and System Management |
| 中文描述： | 季戊四醇功率序列熱插拔控制器和系統(tǒng)管理 |
| 文件頁數(shù)： | 15/25頁 |
| 文件大小： | 548K |
| 代理商： | X80010 |
15
FN8149.0
January 13, 2005
BATT-ON pin is pulled to V
RGO
. The default thresholds have
been set so the external resistance values in Figure 30
provide an overvoltage threshold of 74.9V (X80010/X80012)
or 68V (X80011/X80013), a main undervoltage threshold of
43V and a battery undervoltage threshold of 33.8V.
As shown in Figure 34, this circuit block contains
comparators and voltage references to monitor for a single
overvoltage and dual undervoltage trip points. The
overvoltage and undervoltage trip points as shown in Table 1.
A resistor divider connected between the plus and minus
input voltages and the V
UV/OV
pin (see Figure 32)
determines the overvoltage and undervoltage shutdown
voltages and the operating voltage range. Using the
thresholds in Table and the equations of Figure 32 the
desired operating voltage can be determined. Figure 33
shows the resistance values for various operating voltages
(X80010 and X80012).
Battery Back Up Operations
An external signal, BATT_ON is provided to switch the
undervoltage trip point. The BATT_ON signal is a LOGIC
HIGH if V
IHB
> V
EE
+ 4V and is a LOGIC LOW if V
ILB
< V
EE
+ 2V. The time from a BATT_ON input change to a valid new
undervoltage threshold is 100ns. See Electrical
Specifications for more details.
Note: The V
UV/OV
pin must be limited to less than V
EE
+
5.5V in worst case conditions. Values for R1 and R2 must be
chosen such that this condition is met. Intersil recommends
R1 = 182k
and R2 = 10k
to conform to factory settings.
TABLE 1. OVERVOLTAGE/UNDERVOLTAGE DEFAULT
THRESHOLDS
THRESHOLD
SYMBOL
DESCRIPTION
FALLING
RISING
MAX/MIN
VOLTAGE
1
LOCKOUT
VOLTAGE
2
V
OV
Overvoltage
(X80010/12)
3.87V
3.9V
74.3
74.9
V
OV
Overvoltage
(X80011/13)
3.51V
3.54V
67.4
68
V
UV1
Undervoltage 1
2.21V
2.24V
43.0
42.4
V
UV2
Undervoltage 2
1.73V
1.76V
33.8
33.2
Notes: 1: Max/Min Voltage is the maximum and minimum operat-
ing voltage assuming the recommended V
UV/OV
resis-
tor divider.
2: Lockout voltage is the voltage where the X8001x turns
off the FET.
R1
R2
V
P
V
UV/OV
V
N
Voltage divider:
or:
V
UV OV
V
S
+
R1
R2
----------------------
=
V
S
V
UV OV
----------+
R2
=
V
S
FIGURE 32. OVERVOLTAGE UNDERVOLTAGE DIVIDER
TABLE 2. SELECTING BETWEEN UNDERVOLTAGE TRIP
POINTS
PIN
DESCRIPTION
TRIP POINT SELECTION
BATT_ON
Undervoltage Trip
Point
Selection Pin
If BATT_ON = 0,
V
UV1
trip point is selected;
If BATT_ON = 1,
V
UV2
trip point is selected.
V
UV1
and V
UV2
are undervoltage thresholds.
BATT-ON = V
EE
V
OV
V
UV1
V
UV2
Operating
Voltage
BATT-ON = V
RGO
100
90
80
70
60
50
40
30
20
10
0
1
1
1
1
1
1
1
2
2
2
O
R1 in k
(for R2=10K)
FIGURE 33. OPERATING VOLTAGe vs RESISTOR RATIO
Voltage
Reference
Voltage
Reference
2:1
Mux
Voltage
Reference
-48V
V
UV/OV
BATT_ON
R1
182K
R2
10K
V
UV1
V
UV2
To Gate
Control
To Gate
Control
+
-
+
-
+
-
V
OV
FIGURE 34. OVERVOLTAGE UNDERVOLTAGE FOR PRIMARY
AND BATTERY BACKUP
X80010, X80011, X80012, X80013
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