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參數資料
| 型號： | X40231 |
| 英文描述： | Integrated System Management IC Triple Voltage Monitors, POR, 2 kbit EEPROM Memory, and Single/Dual DCP(帶2K EEPROM和單/雙數字電位器的三路電壓監(jiān)控器) |
| 中文描述： | 綜合系統(tǒng)管理IC三電壓監(jiān)測器，葡萄牙，2千比特的EEPROM內存，單/雙副處長（帶2K的EEPROM和單/雙數字電位器的三路電壓監(jiān)控器） |
| 文件頁數： | 32/39頁 |
| 文件大?。?/td> | 215K |
| 代理商： | X40231 |
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X4023x
– Preliminary Information
Characteristics subject to change without notice.
32 of 39
REV 1.0.4 7/12/01
www.xicor.com
A.C. CHARACTERISTICS (See Figure 27, Figure 28, Figure 29)
A.C. TEST CONDITIONS
NONVOLATILE WRITE CYCLE TIMING
Symbol
t
WC
(4)
CAPACITANCE (T
A
= 25°C, F = 1.0 MHZ, V
CC
= 5V)
Symbol
Notes: 1.
Notes: 2.
Notes: 3.
Notes: 4.
Typical values are for T
A
= 25°C and V
CC
= 5.0V
Cb = total capacitance of one bus line in pF.
Over recommended operating conditions, unless otherwise specified
t
WC
is the time from a valid STOP condition at the end of a write sequence to the end of the self-timed internal nonvolatile write
cycle. It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
This parameter is not 100% tested.
Notes: 5.
Symbol
Parameter
400kHz
Min
Max
Units
f
SCL
t
IN
(5)
t
AA
t
BUF
t
LOW
t
HIGH
t
SU:STA
t
HD:STA
t
SU:DAT
t
HD:DAT
t
SU:STO
t
DH
t
R
(5)
t
F
(5)
t
SU:WP
t
HD:WP
Cb
SCL Clock Frequency
0
400
KHz
Pulse width Suppression Time at inputs
50
ns
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
ns
μ
s
μ
s
ns
SCL LOW to SDA Data Out Valid
0.1
0.9
Time the bus free before start of new transmission
1.3
Clock LOW Time
1.3
Clock HIGH Time
0.6
Start Condition Setup Time
0.6
Start Condition Hold Time
0.6
Data In Setup Time
100
Data In Hold Time
0
Stop Condition Setup Time
0.6
Data Output Hold Time
50
SDA and SCL Rise Time
20 +.1Cb
(2)
300
ns
SDA and SCL Fall Time
20 +.1Cb
(2)
300
ns
μ
s
μ
s
pF
WP Setup Time
0.6
WP Hold Time
0
Capacitive load for each bus line
400
Input Pulse Levels
0.1V
CC
to 0.9V
CC
10ns
Input Rise and Fall Times
Input and Output Timing Levels
0.5V
CC
See Figure 25
Output Load
Parameter
Min.
Typ.(1)
Max.
Units
Nonvolatile Write Cycle Time
5
10
ms
Parameter
Max
Units
Test Conditions
C
OUT
(5)
C
IN
(5)
Output Capacitance (SDA, RESET,
V2FAIL
,
V3FAIL
)
8
pF
V
OUT
= 0V
V
IN
= 0V
Input Capacitance (SCL, WP MR)
6
pF
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相關代理商/技術參數 |
參數描述 |
|---|---|
| X40231S163-A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP |
| X40231S163-B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP |
| X40231S165-A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP |
| X40231S165-B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP |
| X40231S167-A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP |
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