參數(shù)資料
型號(hào)： X40231
英文描述： Integrated System Management IC Triple Voltage Monitors, POR, 2 kbit EEPROM Memory, and Single/Dual DCP(帶2K EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器)
中文描述： 綜合系統(tǒng)管理IC三電壓監(jiān)測(cè)器，葡萄牙，2千比特的EEPROM內(nèi)存，單/雙副處長(zhǎng)（帶2K的EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器）
文件頁數(shù)： 14/39頁
文件大?。?/td> 215K
代理商： X40231
X4023x
– Preliminary Information
Characteristics subject to change without notice.
14 of 39
REV 1.0.4 7/12/01
www.xicor.com
DCP Read Operation
A read of DCPx (x=0,1,2) can be performed using the
three byte random read command sequence shown in
Figure 10.
The master issues the START condition and the Slave
Address Byte 10101110 which specifies that a
“dummy” write” is to be conducted. This “dummy” write
operation sets which DCP is to be read (in the preced-
ing Read operation). An ACKNOWLEDGE is returned
by the X4023x after the Slave Address if received cor-
rectly. Next, an Instruction Byte is issued on SDA. Bits
P1-P0 of the Instruction Byte determine which DCP
“wiper position” is to be read. In this case, the state of
the WT bit is “don’t care”. If the Instruction Byte format
is valid, then another ACKNOWLEDGE is returned by
the X4023x.
Following this ACKNOWLEDGE, the master immedi-
ately issues another START condition and a valid Slave
address byte with the R/W bit set to 1. Then the
X4023x issues an ACKNOWLEDGE followed by Data
Byte, and finally, the master issues a STOP condition.
The Data Byte read in this operation, corresponds to
the “wiper position” (value of the WCR) of the DCP
pointed to by bits P1 and P0.
It should be noted that when reading out the data byte
for DCP0 (64 Tap), the upper two most significant bits
are “unknown” bits. For DCP1 (100 Tap), the upper
most significant bit is an “unknown”. For DCP2 (256
Tap) however, all bits of the data byte are relevant (See
Figure 10).
Slave
Address
Instruction
Byte
A
C
K
A
C
K
S
t
a
r
t
S
t
o
p
Slave
Address
Data Byte
A
C
K
S
t
a
r
t
SDA Bus
Signals from
the Slave
Signals from
the Master
Figure 10. DCP Read Sequence
“Dummy” write
READ Operation
1 0 1
1 1 1 0
0
0 0
0 0
0
W
T
P
1
P
0
1 0 1
1 1 1 1
0
WRITE Operation
-
- -
MSB
“-” = DON’T CARE
LSB
DCPx
x = 0
x = 1
x = 2
S
t
a
r
t
S
t
o
p
Slave
Address
Address
Byte
Data
Byte
A
C
K
A
C
K
A
C
K
SDA Bus
Signals from
the Slave
Signals from
the Master
Figure 11. EEPROM Byte Write Sequence
Internal
Device
Address
1 0 1 0 0 0 0 0
WRITE Operation
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
X40231S163-A 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP
X40231S163-B 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP
X40231S165-A 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP
X40231S165-B 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP
X40231S167-A 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP
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