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參數(shù)資料
| 型號： | WV3EG232M64STSU335D4SG |
| 英文描述： | 512MB - 2x32Mx64 DDR SDRAM UNBUFFERED |
| 中文描述： | 512MB的- 2x32Mx64 DDR SDRAM內(nèi)存緩沖 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大小： | 195K |
| 代理商： | WV3EG232M64STSU335D4SG |
9
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WV3EG232M64STSU-D4
September 2005
Rev. 1
PRELIMINARY
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
DDR SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND
RECOMMENDED AC OPERATING CONDITIONS
0°C ≤ T
A
≤ 70°C, V
CCQ
= 2.5V ±0.2V, V
CC
= 2.5V ±0.2V
Parameter
Symbol
335
Unit
Min
60
72
42
18
18
12
15
1
6
0.45
0.55
-0.6
-0.7
-
0.9
0.4
0.75
0
0.25
0.2
0.2
0.35
0.35
0.75
0.75
0.7
0.7
-0.7
-0.7
10
0.4
0.4
2.2
1.75
75
200
Max
Row Cycle Time
Refresh row cycle time
Row active
RAS# to CAS# delay
Row precharge time
Row active to row active delay
Write recovery time
Last data into Read command
Clock cycle time
Clock high level width
Clock low level width
DQS-out access time from CK/CK#
Output data access time from CK/CK#
Data strobe edge to output data edge
Read Preamble
Read Postamble
CK to valid DQS-in
DQS-in setup time
DQS-in hold time
DQS falling edge to CK rising-setup time
DQS falling edge to CK rising-hold time
DQS-in high level width
DQS-in low level width
Address and control input setup time (fast)
Address and control input hold time (fast)
Address and control input setup (slow)
Address and control input hold time (slow)
Data-out high impedence time from CK/CK#
Data-out low impedence time from CK/CK#
Mode register set cycle time
DQ & DM setup time to DQS
DQ & DM hold time to DQS
Control & address input pulse width
DQ & DM input pulse width
Exit self refresh to non-Read command
Exit self refresh to Read command
Refresh interval time
Output DQS valid window
Clock half period
Data hold skew factor
DQS write postamble
Active Read with auto precharge command
Auto precharge write recovery + Precharge time
NOTE:
AC Timing Parameters are based on
SAMSUNG
components. Other DRAM Manufacturers parameters may be different.
t
RC
t
RFC
t
RAS
t
RCD
t
RP
t
RRD
t
WR
t
WTR
t
CK
t
CH
t
CL
t
DQSCK
t
AC
t
DQSQ
t
RPRE
t
RPST
t
DQSS
t
WPRES
t
WPRE
t
DSS
t
DSH
t
DQSH
t
DQSL
t
IS
t
IH
t
IS
t
IH
t
HZ
t
LZ
t
MRD
t
DS
t
DH
t
IPW
t
DIPW
t
XSNR
t
XSRD
t
REFI
t
QH
t
HP
t
QHS
t
WPST
t
RAP
t
RAL
ns
ns
ns
ns
ns
ns
ns
t
CK
ns
t
CK
t
CK
ns
ns
ns
t
CK
t
CK
t
CK
ns
t
CK
t
CK
t
CK
t
CK
t
CK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
CK
us
ns
ns
ns
ns
ns
t
CK
120K
CL=2.5
12
0.55
0.55
+0.6
+0.7
0.45
1.1
0.6
1.25
+0.7
+0.7
7.8
—
—
0.55
0.6
t
HP
- t
QHS
t
CL
min or t
CH
min
0.4
18
(t
WR
/t
CK
) + (t
RP
/t
CK
)
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| WV3EG264M64EFSU335D4MG | 1GB - 2x64Mx64 DDR SDRAM UNBUFFERED |
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| WV3EG264M64EFSU-D4 | 1GB - 2x64Mx64 DDR SDRAM UNBUFFERED |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WV3EG232M64STSU-D4 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 2x32Mx64 DDR SDRAM UNBUFFERED |
| WV3EG264M64EFSU262D4-MG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB- 2x64Mx64 DDR SDRAM UNBUFFERED, w/PLL |
| WV3EG264M64EFSU262D4-SG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB- 2x64Mx64 DDR SDRAM UNBUFFERED, w/PLL |
| WV3EG264M64EFSU265D4-MG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB- 2x64Mx64 DDR SDRAM UNBUFFERED, w/PLL |
| WV3EG264M64EFSU265D4-SG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB- 2x64Mx64 DDR SDRAM UNBUFFERED, w/PLL |
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