參數(shù)資料
型號(hào)： WV3EG232M64STSU335D4SG
英文描述： 512MB - 2x32Mx64 DDR SDRAM UNBUFFERED
中文描述： 512MB的- 2x32Mx64 DDR SDRAM內(nèi)存緩沖
文件頁數(shù)： 4/14頁
文件大小： 195K
代理商： WV3EG232M64STSU335D4SG
4
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WV3EG232M64STSU-D4
September 2005
Rev. 1
PRELIMINARY
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to V
SS
Voltage on V
CC
and V
CCQ
supply relative to V
SS
Storage temperature
Operating temperature
Power Dissipation
Short circuit output current
NOTES:
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Symbol
V
IN
, V
OUT
V
CC,
V
CCQ
T
STG
T
A
P
D
I
OS
Value
-0.5 ~ 3.6
-0.5 ~ 3.6
-55 ~ +150
0 ~ 70
8
50
Units
V
V
°C
°C
W
mA
DC CHARACTERISTICS
0°C
≤
T
A
≤
70°C, V
CC
= 2.5V ± 0.2V
Parameter
Supply voltage DDR266/DDR333 (nominal V
CC
of 2.5V)
I/O Supply voltage DDR266/DDR333 (nominal V
CC
of 2.5V)
I/O Reference voltage
I/O Termination voltage
Input logic high voltage
Input logic low voltage
Input voltage level, CK and CK#
Input differential voltage, CK and CK#
Input crossing point voltage, CK and CK#
Symbol
V
CC
V
CCQ
V
REF
V
TT
V
IH
(DC)
V
IL
(DC)
V
IN
(DC)
V
ID
(DC)
V
IX
(DC)
Min
2.3
2.3
Max
2.7
2.7
Unit
Note
V
V
V
V
V
V
V
V
uA
0.49*V
CCQ
V
REF
-0.04
V
REF
+0.15
-0.3
-0.3
0.3
0.3
-40
0.51*V
CCQ
V
REF
+0.04
V
CCQ
+0.30
V
REF
-0.15
V
CCQ
+0.30
V
CCQ
+0.60
V
CCQ
+0.60
40
1
2
3
Input leakage current
Addr, CAS#,
RAS#, WE#
CS#, CKE
CK, CK#
DM
I
I
-20
-20
-10
-10
-16.8
16.8
-9
9
20
20
10
10
—
—
—
—
uA
uA
uA
uA
mA
mA
mA
mA
Output leakage current
Output high current (normal strengh); V
OUT
= V +0.84V
Output high current (normal strengh); V
OUT
= V
TT
-0.84V
Output high current (half strengh); V
OUT
= V
TT
+0.45V
Output high current (half strengh); V
OUT
= V
TT
-0.45V
Based on
NANYA
components.
NOTES:
1.
V
REF
is expected to be equal to 0.5*V
CCQ
of the transmitting device, and to track variations in the DC level of the same. Peak to peak noise on V
REF
may not exceed ±2% of the DC
value
2.
V
TT
is not applied directly to the device. V
TT
is a system supply for signal termination resistors,is expected to be set equal to V
REF
, and must track variations in the DC level of V
REF
3.
V
ID
is the magnitude of the difference between the input level on CK and the input level on CK#.
I
OZ
I
OH
I
OL
I
OH
I
OL
CAPACITANCE
V
CC
= 2.5V, V
CCQ
=2.5V, T
A
= 25°C, f = 1MHz
Parameter
Input Capacitance (A0-A12, BA0-BA1, RAS#, CAS#, WE#)
Input Capacitance (CKE0, CKE1)
Input Capacitance (CS0#, CS1#)
Input Capacitance (CK0,CK0#, CK1, CK1#)
Input Capacitance (DM0-DM7)
Data and DQS input/output capacitance (DQ0-DQ63), CB0-7
Based on
NANYA
components.
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
C
OUT
Min
21
13
13
13
13
13
Max
29
17
17
17
15
15
Unit
pF
pF
pF
pF
pF
pF
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