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參數(shù)資料
| 型號(hào)： | W25X80ALDAIZ |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 1M X 8 FLASH 2.7V PROM, PDIP8 |
| 封裝： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-8 |
| 文件頁數(shù)： | 17/45頁 |
| 文件大?。?/td> | 1342K |
| 代理商： | W25X80ALDAIZ |
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W25X10AL, W25X20AL, W25X40AL, W25X80AL
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10.2.12 Block Erase (D8h)
The Block Erase instruction sets all memory within a specified block (64K-bytes) to the erased state of
all 1s (FFh). A Write Enable instruction must be executed before the device will accept the Block
Erase Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS
pin low and shifting the instruction code “D8h” followed a 24-bit block address (A23-A0) (see Figure
2). The Block Erase instruction sequence is shown in figure 13.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not
done the Block Erase instruction will not be executed. After /CS is driven high, the self-timed Block
Erase instruction will commence for a time duration of tBE (See AC Characteristics). While the Block
Erase cycle is in progress, the Read Status Register instruction may still be accessed for checking the
status of the BUSY bit. The BUSY bit is a 1 during the Block Erase cycle and becomes a 0 when the
cycle is finished and the device is ready to accept other instructions again. After the Block Erase cycle
has finished the Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Block Erase
instruction will not be executed if the addressed page is protected by the Block Protect (TB, BP2, BP1,
and BP0) bits (see Status Register Memory Protection table).
Figure 13. Block Erase Instruction Sequence Diagram
相關(guān)PDF資料 |
PDF描述 |
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| WS512K32L-15H1Q | 512K X 32 MULTI DEVICE SRAM MODULE, 15 ns, CPGA66 |
| WS512K32L-15H1M | 512K X 32 MULTI DEVICE SRAM MODULE, 15 ns, CPGA66 |
| WS512K32L-15G4TMA | 512K X 32 MULTI DEVICE SRAM MODULE, 15 ns, CQFP68 |
| WS512K32-45H1C | 512K X 32 MULTI DEVICE SRAM MODULE, 45 ns, CPGA66 |
| WS512K32-15H1CA | 512K X 32 MULTI DEVICE SRAM MODULE, 15 ns, CPGA66 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W25X80ALSNIG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M-BIT, 2M-BIT, 4M-BIT AND 8M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI |
| W25X80ALSNIZ | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M-BIT, 2M-BIT, 4M-BIT AND 8M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI |
| W25X80ALSSIG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M-BIT, 2M-BIT, 4M-BIT AND 8M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI |
| W25X80ALSSIZ | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M-BIT, 2M-BIT, 4M-BIT AND 8M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI |
| W25X80ALZPIG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M-BIT, 2M-BIT, 4M-BIT AND 8M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI |
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