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參數(shù)資料
| 型號(hào)： | W25X40AVSSIG |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 512K X 8 FLASH 2.7V PROM, PDSO8 |
| 封裝： | 0.208 INCH, GREEN, PLASTIC, SOIC-8 |
| 文件頁(yè)數(shù)： | 17/45頁(yè) |
| 文件大?。?/td> | 1344K |
| 代理商： | W25X40AVSSIG |
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W25X10A, W25X20A, W25X40A, W25X80A
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10.2.12 Block Erase (D8h)
The Block Erase instruction sets all memory within a specified block (64K-bytes) to the erased state of
all 1s (FFh). A Write Enable instruction must be executed before the device will accept the Block
Erase Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS
pin low and shifting the instruction code “D8h” followed a 24-bit block address (A23-A0) (see Figure
2). The Block Erase instruction sequence is shown in figure 13.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not
done the Block Erase instruction will not be executed. After /CS is driven high, the self-timed Block
Erase instruction will commence for a time duration of tBE (See AC Characteristics). While the Block
Erase cycle is in progress, the Read Status Register instruction may still be accessed for checking the
status of the BUSY bit. The BUSY bit is a 1 during the Block Erase cycle and becomes a 0 when the
cycle is finished and the device is ready to accept other instructions again. After the Block Erase cycle
has finished the Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Block Erase
instruction will not be executed if the addressed page is protected by the Block Protect (TB, BP2, BP1,
and BP0) bits (see Status Register Memory Protection table).
Figure 13. Block Erase Instruction Sequence Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W25X80AVDAIZ | 1M X 8 FLASH 2.7V PROM, PDIP8 |
| W25X80ALSSIG | 1M X 8 FLASH 2.7V PROM, PDSO8 |
| W25X40ALDAIZ | 512K X 8 FLASH 2.7V PROM, PDIP8 |
| W25X10ALSNIG | 128K X 8 FLASH 2.7V PROM, PDSO8 |
| W27C257P-12 | 32K X 8 EEPROM 12V, 120 ns, PQCC32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W25X40AVZPIG | 功能描述:IC FLASH 16MBIT 100MHZ 8WSON RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:SpiFlash® 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步，DDR II 存儲(chǔ)容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
| W25X40BL | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M-BIT, 2M-BIT AND 4M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI |
| W25X40BLDAIG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M-BIT, 2M-BIT AND 4M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI |
| W25X40BLSNIG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M-BIT, 2M-BIT AND 4M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI |
| W25X40BLSSIG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M-BIT, 2M-BIT AND 4M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI |
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