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參數(shù)資料
| 型號(hào)： | VV5410C036 |
| 廠(chǎng)商： | 意法半導(dǎo)體 |
| 英文描述： | Mono and Colour Digital Video CMOS Image Sensors |
| 中文描述： | 莫諾和數(shù)字視頻彩色CMOS圖像傳感器 |
| 文件頁(yè)數(shù)： | 54/105頁(yè) |
| 文件大小： | 489K |
| 代理商： | VV5410C036 |
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VV5410 & VV6410
Digital Video Interface Format
cd5410-6410f-3-0.fm
Commercial in confidence
54/105
The slow QCK, clocks at pixel rate. Both the falling and rising edge of this clock are used to qualify data. The most significant
data nibble is qualified by the rising edge of the slow QCK and the least significant nibble is qualified by the falling edge of
the slow QCK.
There are 4 modes of operation of QCK.
1. Disabled (Always low - default mode of operation)
2. Free running - qualifies the entire output data stream.
3. Qualify embedded control sequences, status data, (from the SOF line), and pixel data.
4. Qualify pixel data only, (this will include data from the black lines).
The operating mode for QCK is set via the serial interface. The QCK output can be tri-stated either when OEB is driven high or
via the appropriate control bit in the serial interface, (see data_format register[22]).
The QCK pin can also be configured to output the state of a serial interface register bit. This feature allows the sensor to control
external devices, e.g. stepper motors, shutter mechanisms.
Full details of how to configure the QCK output pin can be found in 2 registers, fg_mode[20] and pin_mapping[21].
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