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參數(shù)資料
| 型號： | VV5410C036 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Mono and Colour Digital Video CMOS Image Sensors |
| 中文描述： | 莫諾和數(shù)字視頻彩色CMOS圖像傳感器 |
| 文件頁數(shù)： | 48/105頁 |
| 文件大?。?/td> | 489K |
| 代理商： | VV5410C036 |
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VV5410 & VV6410
Digital Video Interface Format
cd5410-6410f-3-0.fm
Commercial in confidence
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8.3.4
All valid video data is contained on active video lines. The pixel data appears as a continuous stream of bytes within the active
lines. The pixel data may be separated from the line header and end-of-line control sequence by a number of ‘blank’ bytes (07
Valid video line timing
8.3.5
The start of frame line which begins each video field contains no video data but instead contains the contents of the serial
interface register map. Immediately following the SAV sequence there are 2 padding pixels, (see Figure 27), output as blanking
levels, (07
H
). There will be more blanking codes output after all the serial interface registers have been output . The padding
pixels continue to be output until terminated by an end-of-line control sequence. To ensure that no escape/sync characters, (the
reserved FF,FF,00 sequence), appear in the sensor status/configuration information the code 07
H
is output after each serial
interface value.
Start of frame line timing
If a serial interface register location is unused then a default value, the DeviceH register, is output. The read-out order of the
registers is independent of whether the pixel read-out order is shuffled or un-shuffled.
8.3.6
The end of frame line contains no video data. Its sole purpose is to indicate the end of a frame.
End of frame line timing
8.4
On power-up a sensor will pull all data lines high and these lines will remain high while the device is in the power up default, low
power state. The device is removed from this low power mode by the I2C host writing to sensor register, setup0 [address 10 ].
When the device exits the low power mode it will follow a defined power up sequence, please see Figure 30 for more details.
Upon completion of the power up sequence the sensor will begin streaming video.
Detection of sensor using data bus state
8.5
Bit 2 of setup0 register allows the VV5500/VV6500 sensor to be reset to its power-on state via the serial interface. Setting this
“Soft Reset” bit causes all of the serial interface registers including the “Soft Reset” bit to be reset to their default values. This
“Soft Reset” leaves the sensor in low-power mode.
Resetting the Sensor Via the Serial Interface
8.6
On power-up the RESETB pin is configured as an active low system reset which has the same effect as a soft reset issued via
the serial interface as described above.
Resetting the Sensor Via the RESETB pin
8.7
Bit 5 of the pin mapping register [21] allows the RESETB pin to be re-configured as an active low (edge triggered) system
synchronisation signal which will reset the video timing to the beginning of a field but will NOT reset the serial registers therefore
the host does not have to reconfigure the sensor following a resynchronisation.
Resynchronising the Sensor Via the RESETB pin configured as SINB
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相關(guān)代理商/技術(shù)參數(shù) |
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