參數(shù)資料
型號: VSC870TX
廠商: VITESSE SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: High Performance Serial Backplane Transceiver
中文描述: DUAL LINE TRANSCEIVER, PBGA192
封裝: BGA-192
文件頁數(shù): 22/40頁
文件大?。?/td> 511K
代理商: VSC870TX
VITESSE
Data Sheet
VSC870
High Performance Serial
Backplane Transceiver
Page 22
G52190-0, Rev 4.1
01/05/01
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano
Camarillo, CA 93012
Tel: (800) VITESSE
FAX: (805) 987-5896
Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Figure 5: Multicast Recast Functional Timing (Beginning of Multicast)
Figure 6: Multicast Recast Functional Timing (At the End of Packet then Recast)
2.3.7 Unicast Multi Queue Mode (MD[1:0] = 10)
Muti Queue mode assumes there are several unicast data queues on each port card such as virtual output queues
or priority queues, and allows the port card to make multiple connection requests at the same time. The switch chip
performs two levels of arbitration in two word clock cycles. The first level determines which of the requested outputs
are available and holds these outputs. The second level chooses one winner from the available outputs then releases
the rest. Because outputs can be blocked during the first level of arbitration, all Muti Queue CRQ commands are held
at the switch chip and continue to request outputs until one is granted. As in section 2.3.5, if an ACK is not received
before a header word is detected at the parallel interface, a repeated sequence of CRQs are sent to the switch chip
until an output is granted. This sequence depends on the value of CT[2:0]. The port number of the granted output
(P[3:0]) is returned to the port card following the ACK pulse on the ACK/RCLK output. The functional timing
diagram for this mode is shown in Figure 7.
WCLK
TXIN[31:0]
TXTYP[1:0]
REN
CRQ
D0
D1
D2
D3
3
RTM/TCLK
ACK/RCLK
Min 9 word clocks
HDR
2
1
RFM
6 word clocks
WCLK
TXIN[31:0]
TXTYP[1:0]
REN
CRQ-N
D1-0
D2-0
3
RTM/TCLK
ACK/RCLK
HDR-N
2
1
RFM
D0-N
D0-0
D3-0
D4-0
1
NOTE: CRQ-N, HDR-N, D0-N: CRQ, header and first data word of the next packet;
these bytes are ignored by the transceiver during recast.
D0-0, D1-0, D2-0...:
Data words of the recasted packet.
相關(guān)PDF資料
PDF描述
VSC872 80 Gb/s Intelligent Switch Fabric
VSC874 10 Gbps Queue Manager with Integrated SPI4.2 Interface
VSC880 High Performance 16x16 Serial Crosspoint Switch
VSC9110 Target Specification
VSC9115 2.5 Gb/s Multi-Service SONET/SDH Mapper Device with Virtual Concatenation
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VSC872 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:80 Gb/s Intelligent Switch Fabric
VSC872TV01 制造商:Vitesse Semiconductor Corporation 功能描述:
VSC874 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:10 Gbps Queue Manager with Integrated SPI4.2 Interface
VSC880 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:High Performance 16x16 Serial Crosspoint Switch
VSC880TY 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:High Performance 16x16 Serial Crosspoint Switch