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VS28F016SV, MS28F016SV FlashFile
TM
Memory
1.0
INTRODUCTION
The documentation of the Intel VS/MS28F016SV
memory device includes this data sheet, a detailed
user’s manual, and a number of application notes,
all of which are referenced at the end of this data
sheet.
The data sheet is intended to give an overview of
the chip feature-set and of the operating AC/DC
specifications. The 28F016SA (compatible with
VS/MS28F016SV) User’s Manual provides com-
plete descriptions of the user modes, system inter-
face examples and detailed descriptions of all princi-
ples of operation. It also contains the full list of
software algorithm flowcharts, and a brief section on
compatibility with the Intel VE28F008 and M28F008.
1.1 Enhanced Features
The VS/MS28F016SV is backwards compatible with
the VE28F008 and M28F008 and offers the follow-
ing enhancements:
#
SmartVoltage Technology
D Selectable 5.0V or 12.0V V
PP
#
V
PP
Level Bit in Block Status Register
#
Additional RY/BY
Y
Configuration
D Pulse-On-Write/Erase
#
Additional Upload Device Information Command
Feedback
D Device Revision Number
D Device Proliferation Code
D Device Configuration Code
#
x8/x16 Architecture
#
Block Locking
#
2 Page Buffers
#
Instruction Queuing
1.2 Product Overview
The
16-Mbit (16,777,216-bit) block erasable, non-volatile
random
access
memory,
1 Mword x 16 or 2 Mbyte x 8. The VS/MS28F016SV
includes thirty-two 64-KB (65,536 byte) blocks or
thirty-two 32-KW (32,768 word) blocks. A chip mem-
ory map is shown in Figure 3.
VS/MS28F016SV
is
a
high-performance,
organized
as
either
The implementation of a new architecture, with
many enhanced features, will improve the device op-
erating characteristics and result in greater product
reliability and ease of use.
The VS/MS28F016SV incorporates SmartVoltage
technology, providing V
CC
operation at both 3.3V
and 5.0V and program and erase capability at V
PP
e
12.0V or 5.0V. Operating at V
CC
VS/MS28F016SV consumes approximately one-half
the power consumption at 5.0V V
CC
, while 5.0V V
CC
provides highest read performance capability. V
PP
e
5.0V operation eliminates the need for a separate
12.0V converter, while V
PP
e
12.0V maximizes
write/erase performance. In addition to the flexible
program and erase voltages, the dedicated V
PP
gives complete code protection with V
PP
s
V
PPLK
.
e
3.3V, the
Depending on system design specifications, the
VS/MS28F016SV is capable of supporting
D 80 ns access times with a V
CC
of 5.0V
g
5% and
loading of 30 pF
D 85 ns access times with a V
CC
of 5.0V
g
10%
and loading of 100 pF
D 120 ns access times with a V
CC
of 3.3V
g
5%
and loading of 50 pF
A 3/5
Y
input pin configures the device’s internal cir-
cuitry for optimal 3.3V or 5.0V Read/Write operation.
A Command User Interface (CUI) serves as the sys-
tem interface between the microprocessor or micro-
controller and the internal memory operation.
Internal Algorithm Automation allows Byte/Word
Writes and Block Erase operations to be executed
using a Two-Write command sequence to the CUI in
the same way as the VE28F008 or M28F008 8-Mbit
FlashFile memory.
A super-set of commands has been added to the
basic VE28F008 or M28F008 command-set to
achieve higher write performance and provide addi-
tional capabilities. These new commands and fea-
tures include:
#
Page Buffer Writes to Flash
#
Command Queuing Capability
#
Automatic Data Writes during Erase
#
Software Locking of Memory Blocks
#
Two-Byte Successive Writes in 8-bit Systems
#
Erase All Unlocked Blocks
3