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參數資料
| 型號： | VS1003 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | Codec |
| 英文描述： | MP3 / WMA AUDIO CODEC |
| 中文描述： | MP3播放/ WMA音頻編解碼器 |
| 文件頁數： | 18/57頁 |
| 文件大?。?/td> | 456K |
| 代理商： | VS1003 |
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VLSI
Solution
y
VS1003 PRELIMINARY
VS1003
7. SPI BUSES
7.4.3
SDI in VS1001 Compatibility Mode
BSYNC
SDATA
DCLK
D7
D6
D5
D4
D3
D2
D1
D0
Figure 4: BSYNC Signal - one byte transfer.
When VS1003 is running in VS1001 compatibility mode, a BSYNC signal must be generated to ensure
correct bit-alignment of the input bitstream. The first DCLK sampling edge (rising or falling, depending
on selected polarity), during which the BSYNC is high, marks the first bit of a byte (LSB, if LSB-first
order is used, MSB, if MSB-first order is used). If BSYNC is ’1’ when the last bit is received, the receiver
stays active and next 8 bits are also received.
BSYNC
SDATA
DCLK
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
Figure 5: BSYNC Signal - two byte transfer.
7.4.4
Passive SDI Mode
If SM NEWMODE is 0 and SM SDISHARE is 1, the operation is otherwise like the VS1001 compat-
ibility mode, but bits are only received while the BSYNC signal is ’1’. Rising edge of BSYNC is still
used for synchronization.
7.5
Serial Protocol for Serial Command Interface (SCI)
7.5.1
General
The serial bus protocol for the Serial Command Interface SCI (Chapter 8.5) consists of an instruction
byte, address byte and one 16-bit data word. Each read or write operation can read or write a single
register. Data bits are read at the rising edge, so the user should update data at the falling edge. Bytes are
always send MSb first.
The operation is specified by an 8-bit instruction opcode. The supported instructions are read and write.
See table below.
Instruction
Opcode
0b0000 0011
0b0000 0010
Name
READ
WRITE
Operation
Read data
Write data
Note: VS1003 sets DREQ low after each SCI operation. The duration depends on the operation. It is not
allowed to start a new SCI/SDI operation before DREQ is high again.
Version 0.92,
2005-06-07
18
相關PDF資料 |
PDF描述 |
|---|---|
| VS100 | Interface IC |
| VS100AE | CAMERA MONOCHROME |
| VS1024 | AREA CCD IMAGE ARRAY |
| VS10P05 | Direct ProTek Replacement:VS10P05 |
| VS10P05C | Direct ProTek Replacement:VS10P05C |
相關代理商/技術參數 |
參數描述 |
|---|---|
| VS1003-BB | 制造商:Distributed By MCM 功能描述:VS1003 MP3/WMA BREAKOUT BOARD |
| VS1003B-L | 制造商:CONSONANCE 制造商全稱:CONSONANCE 功能描述:芬蘭VLSI廠家生產的音頻編解碼芯片 |
| VS100-48 | 制造商:TDK-Lambda Corporation 功能描述:105.6W AC To DC Switching Power Supply - 85-132V/110-175V in - 48V 2.2A out |
| VS1005 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:此產品是芬蘭VLSI剛剛研發(fā)成功的音頻編解碼芯片樣品 |
| VS100AE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CAMERA MONOCHROME |
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