參數(shù)資料
型號: V54C365804VCT8L
廠商: MOSEL-VITELIC
元件分類: DRAM
英文描述: 8M X 8 SYNCHRONOUS DRAM, 7 ns, PDSO54
封裝: 0.400 INCH, PLASTIC, TSOP2-54
文件頁數(shù): 2/54頁
文件大?。?/td> 453K
代理商: V54C365804VCT8L
10
V54C365804VC Rev. 0.6 September 1999
MOSEL VITELIC
V54C365804VC
Absolute Maximum Ratings*
Operating temperature range ..................0 to 70
°C
Storage temperature range ............... -55 to 150
°C
Input/output voltage .................. -0.3 to (VCC+0.3) V
Power supply voltage .......................... -0.3 to 4.6 V
Power dissipation ............................................. 1 W
Data out current (short circuit) ...................... 50 mA
*Note: Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage of the device.
Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Recommended Operation and Characteristics for LV-TTL
TA = 0 to 70 °C; VSS = 0 V; VCC,VCCQ = 3.3 V ± 0.3 V
Note:
1.
All voltages are referenced to VSS.
2.
VIH may overshoot to VCC + 2.0 V for pulse width of < 4ns with 3.3V. VIL may undershoot to -2.0 V for pulse width < 4.0 ns with
3.3V. Pulse width measured at 50% points with amplitude measured peak to DC reference.
Parameter
Symbol
Limit Values
Unit
Notes
min.
max.
Input high voltage
VIH
2.0
Vcc+0.3
V
1, 2
Input low voltage
VIL
– 0.3
0.8
V
1, 2
Output high voltage (IOUT = – 2.0 mA)
VOH
2.4
V
Output low voltage (IOUT = 2.0 mA)
VOL
0.4
V
Input leakage current, any input
(0 V < VIN < 3.6 V, all other inputs = 0 V)
II(L)
– 5
5
A
Output leakage current
(DQ is disabled, 0 V < VOUT < VCC)
IO(L)
– 5
5
A
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