參數(shù)資料
型號： UPD9611GT
廠商： NEC Corp.
元件分類： Codec
英文描述： FOUR-CHANNEL PCM CODEC
中文描述： 四通道的PCM編解碼器
文件頁數(shù)： 9/28頁
文件大?。?/td> 161K
代理商： UPD9611GT
μ
PD9611
9
(5) Control of SP
DATA
pin
If SP
SYNC
pin is set to the high level in synchronization with the rising edge (
↑
) of the data clock applied
to the SP
CLK
pin, data of the SP
DATA
pin is latched by the falling edge (
↓
) of the data clock and
consecutively fetched in.
After the 8-bit data has been fetched, the setting operation is performed according to the data.
This setting operation is performed during the 8 clocks after fetching the data and the next data is valid
at the 17th clock.
Therefore, when setting 1 word (8 bits) of data, input 17 clocks or more to the SP
CLK
pin.
Ensure that 17 clocks or more are input to the SP
CLK
pin between the rising of SP
SYNC
and the rising of
the next SP
SYNC
.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
SP
SYNC
SP
CLK
SP
DATA
Setting
completed
(The next
data is valid.)
Setting operation
Data fetch
Don’t care
17 clocks or more
SP
SYNC
SP
CLK
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