![](http://datasheet.mmic.net.cn/Renesas-Electronics-America/UPD78F4225YGC-8BT-A_datasheet_99861/UPD78F4225YGC-8BT-A_574.png)
572
CHAPTER 29
ELECTRICAL SPECIFICATIONS
User’s Manual U12697EJ4V1UD
Subsystem Clock Oscillator Characteristics (TA =
40 to +85°C)
Resonator Recommended Circuit
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Crystal
Oscillation frequency (fXT)32
32.768
35
kHz
resonator
Oscillation stabilization
4.5 V
≤ VDD ≤ 5.5 V
1.2
2
s
timeNote
1.9 V
≤ VDD < 4.5 V
10
External
XT1 input frequency (fXT)32
35
kHz
clock
XT1 input high-/low-level
14.3
15.6
s
width (tXTH, tXTL)
Note Time required to stabilize oscillation after applying supply voltage (VDD).
Cautions 1. When using the subsystem clock oscillator, wire as follows in the area enclosed by the broken
lines in the above figures to avoid an adverse effect from wiring capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always make the ground point of the oscillator capacitor the same potential as VSS.
Do not ground the capacitor to a ground pattern through which a high current flows.
Do not fetch signals from the oscillator.
2. When the main system clock is stopped and the device is operating on the subsystem clock,
wait until the oscillation stabilization time has been secured by the program before switching
back to the main system clock.
Remark For the resonator selection and oscillator constant, customers are required to either evaluate the
oscillation themselves or apply to the resonator manufacturer for evaluation.
VSS XT2
XT1
XT2
XT1
PD74HCU04